Inventor

VRUDHULA SARMA

US22 patents

⚠️ This page may combine multiple inventors who share the name “VRUDHULA SARMA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VRUDHULA SARMA

VRUDHULA SARMA

Method of obfuscating digital logic circuits using threshold voltage

Threshold logic element with stabilizing feedback

Threshold logic gates with resistive networks

Technology mapping for threshold and logic gate hybrid circuits

Clock skewing strategy to reduce dynamic power and eliminate hold-time violations in synchronous digital VLSI designs

Hold violation free scan chain and scanning mechanism for testing of synchronous digital VLSI circuits

Energy efficient, robust differential mode d-flip-flop

FPGA with reconfigurable threshold logic gates for improved performance, power, and area

System and method for clock distribution in a digital circuit

UNIV ARIZONA STATE

Robust, low power, reconfigurable threshold logic array

Threshold logic gates using flash transistors

UNIV ARIZONA

Method of evaluating integrated circuit system performance using orthogonal polynomials

Threshold gate and threshold logic array

GOWDA TEJASWI

Decomposition based approach for the synthesis of threshold logic circuits

Combinational equivalence checking for threshold logic circuits

ARIZONA BOARD OF REGENTS FOR AND ON BEHALF OF ARIZONA STATE UNIV

Determining parameters that affect processor energy efficiency

Processor control system

SEO JAE SUN

Neuromorphic computational system(s) using resistive synaptic devices

YU SHIMENG

Resistive cross-point architecture for robust data representation with arbitrary precision

LESHNER SAMUEL

Threshold logic element having low leakage power and high performance

YANG JINGHUA

Non-volatile logic device for energy-efficient logic state restoration

Azari Elham

Neural network circuitry having approximate multiplier units