Inventor
TRIVEDI VISHAL P
US30 patents
⚠️ This page may combine multiple inventors who share the name “TRIVEDI VISHAL P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TRIVEDI VISHAL P
12 patentsUS8193868B2Jun 5, 2012
Switched capacitor circuit for a voltage controlled oscillator
TRIVEDI VISHAL P11 citations83
US8629732B2Jan 14, 2014
Voltage-controlled oscillators and related systems
TRIVEDI VISHAL P11 citations81
US9106179B2Aug 11, 2015
Voltage-controlled oscillators and related systems
TRIVEDI VISHAL P4 citations70
US8912569B2Dec 16, 2014
Hybrid transistor
TRIVEDI VISHAL P2 citations62
US8264295B2Sep 11, 2012
Switched varactor circuit for a voltage controlled oscillator
TRIVEDI VISHAL P3 citations62
US7713801B2May 11, 2010
Method of making a semiconductor structure utilizing spacer removal and semiconductor structure
TRIVEDI VISHAL P5 citations62
US9099445B2Aug 4, 2015
Electronic device including interconnects with a cavity therebetween and a process of forming the same
TRIVEDI VISHAL P0 citations51
US9070786B2Jun 30, 2015
Methods for forming transistors
TRIVEDI VISHAL P0 citations51
US8530347B2Sep 10, 2013
Electronic device including interconnects with a cavity therebetween and a process of forming the same
TRIVEDI VISHAL P0 citations51
US8461012B2Jun 11, 2013
Device with ground plane for high frequency signal transmission and method therefor
TRIVEDI VISHAL P1 citations51
US8138073B2Mar 20, 2012
Method for forming a Schottky diode having a metal-semiconductor Schottky contact
TRIVEDI VISHAL P0 citations41
US9099957B2Aug 4, 2015
Voltage-controlled oscillators and related systems
TRIVEDI VISHAL P0 citations39
FREESCALE SEMICONDUCTOR INC
11 patentsUS7833852B2Nov 16, 2010
Source/drain stressors formed using in-situ epitaxial growth
FREESCALE SEMICONDUCTOR INC8 citations84
US7803685B2Sep 28, 2010
Silicided base structure for high frequency transistors
FREESCALE SEMICONDUCTOR INC7 citations73
US7811889B2Oct 12, 2010
FinFET memory cell having a floating gate and method therefor
FREESCALE SEMICONDUCTOR INC6 citations63
US7737018B2Jun 15, 2010
Process of forming an electronic device including forming a gate electrode layer and forming a patterned masking layer
FREESCALE SEMICONDUCTOR INC4 citations63
US7727829B2Jun 1, 2010
Method of forming a semiconductor device having a removable sidewall spacer
FREESCALE SEMICONDUCTOR INC4 citations63
US7846803B2Dec 7, 2010
Multiple millisecond anneals for semiconductor device fabrication
FREESCALE SEMICONDUCTOR INC3 citations62
US7479465B2Jan 20, 2009
Transfer of stress to a layer
FREESCALE SEMICONDUCTOR INC3 citations61
US8053866B2Nov 8, 2011
Varactor structures
FREESCALE SEMICONDUCTOR INC2 citations59
US8022507B2Sep 20, 2011
Varactor diodes
FREESCALE SEMICONDUCTOR INC0 citations52
US7821103B2Oct 26, 2010
Counter-doped varactor structure and method
FREESCALE SEMICONDUCTOR INC0 citations48
US7795089B2Sep 14, 2010
Forming a semiconductor device having epitaxially grown source and drain regions
FREESCALE SEMICONDUCTOR INC0 citations41
JOHN JAY P
3 patentsUS8084786B2Dec 27, 2011
Silicided base structure for high frequency transistors
JOHN JAY P7 citations82
US8664698B2Mar 4, 2014
Bipolar transistor and method with recessed base electrode
JOHN JAY P2 citations61
US9105678B2Aug 11, 2015
Semiconductor devices with recessed base electrode
JOHN JAY P1 citations51