Inventor
HASSNER MARTIN AURELIANO
US36 patents
⚠️ This page may combine multiple inventors who share the name “HASSNER MARTIN AURELIANO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
23 patentsUS6792569B2Sep 14, 2004
Root solver and associated method for solving finite field polynomial equations
IBM110 citations97
US6446234B1Sep 3, 2002
Method and apparatus for updating cyclic redundancy check information for data storage
IBM147 citations96
US6438724B1Aug 20, 2002
Method and apparatus for deterministically altering cyclic redundancy check information for data storage
IBM83 citations96
US6275965B1Aug 14, 2001
Method and apparatus for efficient error detection and correction in long byte strings using generalized, integrated, interleaved reed-solomon codewords
IBM58 citations96
US7134066B2Nov 7, 2006
Generalized parity stripe data storage array
IBM31 citations92
US7131052B2Oct 31, 2006
Algebraic decoder and method for correcting an arbitrary mixture of burst and random errors
IBM20 citations92
US6654924B1Nov 25, 2003
System and method for error correction of digitized phase signals from MR/GMR head readback waveforms
IBM45 citations92
US6195025B1Feb 27, 2001
Method and means for invertibly mapping binary sequences into rate 2/3 (1,K) run-length-limited coded sequences with maximum transition density constraints
IBM20 citations92
US6154868ANov 28, 2000
Method and means for computationally efficient on-the-fly error correction in linear cyclic codes using ultra-fast error location
IBM17 citations92
US6903887B2Jun 7, 2005
Multiple level (ML), integrated sector format (ISF), error correction code (ECC) encoding and decoding processes for data storage or communication devices and systems
IBM51 citations91
US6553536B1Apr 22, 2003
Soft error correction algebraic decoder
IBM48 citations91
US6651213B2Nov 18, 2003
Programmable multi-level track layout method and system for optimizing ECC redundancy in data storage devices
IBM36 citations90
US6928515B2Aug 9, 2005
Integrated sector format-error correction code system and method for efficient writing in a disk array system
IBM12 citations84
US6405339B1Jun 11, 2002
Parallelized programmable encoder/syndrome generator
IBM19 citations84
US6891690B2May 10, 2005
On-drive integrated sector format raid error correction code system and method
IBM16 citations83
US6687067B2Feb 3, 2004
Perpendicular signal equalization and timing recovery using Hilbert transform
IBM11 citations73
US6671850B1Dec 30, 2003
On-the-fly algebraic error correction system and method for reducing error location search
IBM11 citations73
US6345376B1Feb 5, 2002
Method and means for computationally efficient on-the-fly error correction in linear cyclic codes using ultra-fast error location
IBM13 citations73
US6233714B1May 15, 2001
Generalized method and means for defining and operating a (d, k) partial-response ML detector of binary-coded sequences
IBM7 citations72
US6498692B1Dec 24, 2002
System and method for processing MR/GMR head signal using phase measurement
IBM5 citations62
US6023782AFeb 8, 2000
RAM based key equation solver apparatus
IBM4 citations62
US5963152AOct 5, 1999
Resolving block method for synchronization correction in run-length limited codes
IBM2 citations56
US7272777B2Sep 18, 2007
Method for correcting a burst of errors plus random errors
IBM1 citations46
HGST Netherlands BV
4 patentsUS9229813B2Jan 5, 2016
Error correction with on-demand parity sectors in magnetic data storage devices
HGST Netherlands BV11 citations83
US8856618B2Oct 7, 2014
Scalable repair block error correction for sequential multiple data blocks in a magnetic data storage device
HGST Netherlands BV13 citations82
US9548070B1Jan 17, 2017
HDD magnetic head degradation field-failure detection and prediction
HGST Netherlands BV3 citations69
US9286159B2Mar 15, 2016
Track-band squeezed-sector error correction in magnetic data storage devices
HGST Netherlands BV1 citations51