Inventor
LOEWENSTEIN PAUL N
US27 patents
⚠️ This page may combine multiple inventors who share the name “LOEWENSTEIN PAUL N”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SUN MICROSYSTEMS INC
12 patentsUS5887138AMar 23, 1999
Multiprocessing computer system employing local and global address spaces and COMA and NUMA access modes
SUN MICROSYSTEMS INC168 citations99
US5983326ANov 9, 1999
Multiprocessing system including an enhanced blocking mechanism for read-to-share-transactions in a NUMA mode
SUN MICROSYSTEMS INC72 citations96
US5881303AMar 9, 1999
Multiprocessing system configured to perform prefetch coherency activity with separate reissue queue for each processing subnode
SUN MICROSYSTEMS INC59 citations96
US5862316AJan 19, 1999
Multiprocessing system having coherency-related error logging capabilities
SUN MICROSYSTEMS INC90 citations95
US5950226ASep 7, 1999
Multiprocessing system employing a three-hop communication protocol
SUN MICROSYSTEMS INC30 citations92
US5897657AApr 27, 1999
Multiprocessing system employing a coherency protocol including a reply count
SUN MICROSYSTEMS INC46 citations92
US5893160AApr 6, 1999
Deterministic distributed multi-cache coherence method and system
SUN MICROSYSTEMS INC34 citations92
US7657710B2Feb 2, 2010
Cache coherence protocol with write-only permission
SUN MICROSYSTEMS INC14 citations84
US7480771B2Jan 20, 2009
Conditional synchronization mechanisms allowing multiple store operations to become visible while a flagged memory location is owned and remains unchanged
SUN MICROSYSTEMS INC10 citations84
US7325101B1Jan 29, 2008
Techniques for reducing off-chip cache memory accesses
SUN MICROSYSTEMS INC11 citations84
US7680989B2Mar 16, 2010
Instruction set architecture employing conditional multistore synchronization
SUN MICROSYSTEMS INC4 citations63
US7412567B2Aug 12, 2008
Value-based memory coherence support
SUN MICROSYSTEMS INC3 citations62
ORACLE INT CORP
12 patentsUS9110718B2Aug 18, 2015
Supporting targeted stores in a shared-memory multiprocessor system
ORACLE INT CORP8 citations84
US10423482B2Sep 24, 2019
Robust pin-correcting error-correcting code
ORACLE INT CORP3 citations73
US9160370B2Oct 13, 2015
Single component correcting ECC using a reducible polynomial with GF(2) coefficients
ORACLE INT CORP2 citations63
US10467139B2Nov 5, 2019
Fault-tolerant cache coherence over a lossy network
ORACLE INT CORP1 citations56
US9940132B2Apr 10, 2018
Load-monitor mwait
ORACLE INT CORP1 citations52
US9679084B2Jun 13, 2017
Memory sharing across distributed nodes
ORACLE INT CORP1 citations52
US8990503B2Mar 24, 2015
Monitoring multiple memory locations for targeted stores in a shared-memory multiprocessor
ORACLE INT CORP0 citations52
US10223116B2Mar 5, 2019
Memory sharing across distributed nodes
ORACLE INT CORP0 citations51
US9195531B2Nov 24, 2015
Processor design verification
ORACLE INT CORP1 citations42
US9836326B2Dec 5, 2017
Cache probe request to optimize I/O directed caching
ORACLE INT CORP0 citations37
US8972663B2Mar 3, 2015
Broadcast cache coherence on partially-ordered network
ORACLE INT CORP0 citations36
US10452547B2Oct 22, 2019
Fault-tolerant cache coherence over a lossy network
ORACLE INT CORP0 citations35