Inventor

LOUIE BENJAMIN S

US45 patents

⚠️ This page may combine multiple inventors who share the name “LOUIE BENJAMIN S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LOUIE BENJAMIN S

ZENO SEMICONDUCTOR INC

Memory cell comprising first and second transistors and methods of operating

Memory device having electrically floating body transistor

Memory device having electrically floating body transistor

Content addressable memory device having electrically floating body transistor

Memory cell comprising first and second transistors and methods of operating

Memory device having electrically floating body transistor

Content addressable memory device having electrically floating body transistor

Memory device having electrically floating body transistor

Memory cell comprising first and second transistors and methods of operating

NAND string utilizing floating body memory cell

Content addressable memory device having electrically floating body transistor

Systems and methods for reducing standby power in floating body memory devices

Memory device having electrically floating body transistor

Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers

NAND string utilizing floating body memory cell

Systems and methods for reducing standby power in floating body memory devices

NAND string utilizing floating body memory cell

Systems and methods for reducing standby power in floating body memory devices

Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers

Content addressable memory device having electrically floating body transistor

NAND string utilizing floating body memory cell

Memory device having electrically floating body transistor

Memory cell comprising first and second transistors and methods of operating

Systems and methods for reducing standby power in floating body memory devices

Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers

Content addressable memory device having electrically floating body transistor

NAND string utilizing floating body memory cell

Systems and methods for reducing standby power in floating body memory devices

NAND string utilizing floating body memory cell

Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers

Systems and methods for reducing standby power in floating body memory devices

Systems and methods for reducing standby power in floating body memory devices

Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers

Memory device having electrically floating body transistor

Content addressable memory device having electrically floating body transistor

NAND string utilizing floating body memory cell

Systems and methods for reducing standby power in floating body memory devices

Memory device having electrically floating body transistor

NAND string utilizing floating body memory cell

Content addressable memory device having electrically floating body transistor

Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers

Memory cell comprising first and second transistors and methods of operating

WIDJAJA YUNIARTO

Memory device having electrically floating body transitor

LOUIE BENJAMIN S

Content addressable memory device having electrically floating body transistor

MICRON TECHNOLOGY INC

System and method for reducing pin-count of memory devices, and memory device testers for same