P

Inventor

LUO LEESHAWN

US12 patents
⚠️ This page may combine multiple inventors who share the name “LUO LEESHAWN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ALPHA & OMEGA SEMICONDUCTOR

7 patents
US7208818B2Apr 24, 2007

Power semiconductor package

ALPHA & OMEGA SEMICONDUCTOR47 citations92
US7183616B2Feb 27, 2007

High speed switching MOSFETS using multi-parallel die packages with/without special leadframes

ALPHA & OMEGA SEMICONDUCTOR29 citations92
US7391100B2Jun 24, 2008

Integrated circuit package for semiconductor devices having a reduced leadframe pad and an increased bonding area

ALPHA & OMEGA SEMICONDUCTOR9 citations84
US7633140B2Dec 15, 2009

Inverted J-lead for power devices

ALPHA & OMEGA SEMICONDUCTOR14 citations82
US7897438B2Mar 1, 2011

Method of making semiconductor package with plated connection

ALPHA & OMEGA SEMICONDUCTOR2 citations61
US7394151B2Jul 1, 2008

Semiconductor package with plated connection

ALPHA & OMEGA SEMICONDUCTOR3 citations61
US7951651B2May 31, 2011

Dual flat non-leaded semiconductor package

ALPHA & OMEGA SEMICONDUCTOR0 citations52

LUO LEESHAWN

2 patents
US8067822B2Nov 29, 2011

Integrated circuit package for semiconductor devices with improved electric resistance and inductance

LUO LEESHAWN7 citations82
US8169062B2May 1, 2012

Integrated circuit package for semiconductior devices with improved electric resistance and inductance

LUO LEESHAWN6 citations71

SUN MING

2 patents
US9337132B2May 10, 2016

Methods and configuration for manufacturing flip chip contact (FCC) power package

SUN MING3 citations73
US8564049B2Oct 22, 2013

Flip chip contact (FCC) power package

SUN MING1 citations51

(unassigned)

1 patent
US6841852B2Jan 11, 2005

Integrated circuit package for semiconductor devices with improved electric resistance and inductance

37 citations92