Inventor
SANKARANARAYANAN JAYASREE
IN7 patents
Patents
7 patentsUS9652686B2May 16, 2017
Optimized fast feature detection for vector processors
TEXAS INSTRUMENTS INC10 citations80
US12554502B2Feb 17, 2026
Method for performing random read access to a block of data using parallel LUT read instruction in vector processors
TEXAS INSTRUMENTS INC0 citations60
US12056491B2Aug 6, 2024
Method for performing random read access to a block of data using parallel lut read instruction in vector processors
TEXAS INSTRUMENTS INC0 citations60
US11669330B2Jun 6, 2023
Method for performing random read access to a block of data using parallel LUT read instruction in vector processors
TEXAS INSTRUMENTS INC0 citations60
US10996955B2May 4, 2021
Method for performing random read access to a block of data using parallel LUT read instruction in vector processors
TEXAS INSTRUMENTS INC0 citations60
US10331347B2Jun 25, 2019
Method for performing random read access to a block of data using parallel LUT read instruction in vector processors
TEXAS INSTRUMENTS INC0 citations50
US10395381B2Aug 27, 2019
Method to compute sliding window block sum using instruction based selective horizontal addition in vector processor
TEXAS INSTRUMENTS INC0 citations39