Inventor

RAGHAVAN RAM

US20 patents

⚠️ This page may combine multiple inventors who share the name “RAGHAVAN RAM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RAGHAVAN RAM

IBM

Multiple history based micro partition prefetch optimization

Priority control in resource allocation for low request rate, latency-sensitive units

Token swapping for hot spot management

Counter-based victim selection in a cache memory

Reducing memory access latency for hypervisor- or supervisor-initiated memory access requests

Counter-based victim selection in a cache memory

Gradually throttling memory due to dynamic thermal conditions

Virtual processor cache reuse

Adaptive shared data interventions in coupled broadcast engines

FLEMMING DIANE G

Mixed operating performance modes including a shared cache mode

Mixed operating performance modes including a shared cache mode

FLEMMING DIANE GARZA

Two partition accelerator and application of tiered flash to cache hierarchy in partition acceleration

Flexible use of extended cache using a partition cache footprint

ACCAPADI MATTHEW

Managing migration of a prefetch stream from one processor core to another processor core

Managing migration of a prefetch stream from one processor core to another processor core

BELL JR ROBERT H

Performance of emerging applications in a virtualized environment using transient instruction streams

Performance of emerging applications in a virtualized environment using transient instruction streams

RUSSELL WILLIAM C

Polycrystalline diamond material with extremely fine microstructures

CHEN WEN-TZER T

Mechanisms for priority control in resource allocation

NICHOLAS RICHARD

Access speculation predictor implemented via idle command processing resources