Inventor

SHRIVASTAVA NEERAJ

IN26 patents

⚠️ This page may combine multiple inventors who share the name “SHRIVASTAVA NEERAJ”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHRIVASTAVA NEERAJ

TEXAS INSTRUMENTS INC

Analog to digital converter with improved input overload recovery

Lookup-table-based analog-to-digital converter

Calibration technique for current steering DAC

Negative capacitance circuits including temperature-compensation biasings

Gain mismatch correction for voltage-to-delay preamplifier array

Top plate sampling circuit including input-dependent dual clock boost circuits

Analog-to-digital converter (ADC) having linearization circuit with reconfigurable lookup table (LUT) memory and calibration options

Pattern based estimation of errors in ADC

Continuous time linear capacitive digital step attenuator

Noise-shaping of additive dither in analog-to-digital converters

Calibration scheme for filling lookup table in an ADC

Flexible and efficient device trim support using eFuse

Analog-to-digital converter (ADC) having linearization circuit with reconfigurable lookup table (LUT) memory and calibration options

Lookup table for non-linear systems

Non-linearity correction

Pipelined analog-to-digital converter

Flexible and efficient device trim support using efuse

Top plate sampling circuit including input-dependent dual clock boost circuits

Reference voltage control circuit for a two-step flash analog-to-digital converter

Reference voltage control circuit for a two-step flash analog-to-digital converter

Pattern based estimation of errors in ADC

Voltage-to-delay converter

Top plate sampling analog-to-digital converter (ADC) with residue amplifier non-linearity reduction

Metastability error detection and BER improvement technique in pipelined ADCs

Analog-to-digital converter

SHRIVASTAVA NEERAJ

Capacitor nonlinearity correction