Inventor

HUNG CHING-YU

US38 patents

⚠️ This page may combine multiple inventors who share the name “HUNG CHING-YU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HUNG CHING-YU

TEXAS INSTRUMENTS INC

Reconfigurable SIMD coprocessor architecture for sum of absolute differences and symmetric filtering (scalable MAC engine for image processing)

Reconfigurable multiply-accumulate hardware co-processor unit

Digital signal processor with efficiently connectable hardware co-processor

Digital still camera system and method

Multiplexer reconfigurable image processing peripheral having for loop control

Efficient look-up table methods for Reed-Solomon decoding

Sliding data buffering for image processing

Resampling methods for digital images

Coprocessor for synthesizing signals based upon quadratic polynomial sinusoids

Parallel architecture for matrix transposition

Video coding with CABAC

Systems and methods for software instruction translation from a high-level language to a specialized instruction set

Linear transform system for decoding video data

Vector table load instruction with address generation field to access table offset value

Video processing subsystem architecture

Reformatter and method

Video encoding using parallel processors

NVIDIA CORP

Using a vector processor to configure a direct memory access system for feature tracking operations in a system on a chip

Built-in self-test for a programmable vision accelerator of a system on a chip

Performing multiple point table lookups in a single cycle in a system on chip

Hardware accelerated anomaly detection using a min/max collector in a system on a chip

Using a hardware sequencer in a direct memory access system of a system on a chip

Accelerating table lookups using a decoupled lookup table accelerator in a system on a chip

Using a hardware sequencer in a direct memory access system of a system on a chip

Using per memory bank load caches for reducing power use in a system on a chip

Built-in self-test for a programmable vision accelerator of a system on a chip

Hardware accelerated anomaly detection using a min/max collector in a system on a chip

Using a vector processor to configure a direct memory access system for feature tracking operations in a system on a chip

Accelerating table lookups using a decoupled lookup table accelerator in a system on a chip

Using per memory bank load caches for reducing power use in a system on a chip

Performing load and permute with a single instruction in a system on a chip

Performing load and store operations of 2D arrays in a single cycle in a system on a chip

Reduced memory write requirements in a system on a chip using automatic store predication

HUNG CHING-YU

Processor with instruction variable data distribution

Deblocking filters

HUNG CHING YU

Processor with table lookup processing unit

ZHOU MINHUA

Reducing memory bandwidth for processing digital image data

PRIMAX ELECTRONICS LTD

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