Inventor

GUARNERA ALFIO

IT18 patents

⚠️ This page may combine multiple inventors who share the name “GUARNERA ALFIO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GUARNERA ALFIO

ST MICROELECTRONICS SRL

4H—SiC electronic device with improved short-circuit performances, and manufacturing method thereof

Manufacturing method of a semiconductor device with efficient edge structure

4H-SiC electronic device with improved short-circuit performances, and manufacturing method thereof

Manufacturing method of a semiconductor device with efficient edge structure

Manufacturing method of a semiconductor device with efficient edge structure

Manufacturing method of a semiconductor device with efficient edge structure

Silicon carbide power device with improved robustness and corresponding manufacturing process

Silicon carbide power device with improved robustness and corresponding manufacturing process

4H-SiC MOSFET device and manufacturing method thereof

Multi-drain semiconductor power device and edge-termination structure thereof

Vertical-conduction silicon carbide MOSFET device having improved gate biasing structure and manufacturing process thereof

Silicon carbide vertical conduction MOSFET device and manufacturing process thereof

Silicon carbide vertical conduction MOSFET device for power applications and manufacturing process thereof

GUARNERA ALFIO

Process for manufacturing a power semiconductor device having charge-balance columnar structures on a non-planar surface, and corresponding power semiconductor device

Process for manufacturing a power semiconductor device having charge-balance columnar structures on a non-planar surface, and corresponding power semiconductor device

Process for manufacturing a power semiconductor device having charge-balance columnar structures on a non-planar surface, and corresponding power semiconductor device

SAGGIO MARIO GIUSEPPE

Multi-drain semiconductor power device and edge-termination structure thereof

Power MOSFET comprising a plurality of columnar structures defining the charge balancing region