Inventor

SONNIER DAVID

US19 patents

⚠️ This page may combine multiple inventors who share the name “SONNIER DAVID”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SONNIER DAVID

INTEL CORP

Dynamic load balancing for multi-core computing environments

Multi-core communication acceleration using hardware queue device

Hardware queue scheduling for multi-core computing environments

Technologies for a distributed hardware queue manager

Multi-core communication acceleration using hardware queue device

Dynamic load balancing for multi-core computing environments

Dynamic load balancing for multi-core computing environments

SUNDARARAMAN BALAKRISHNAN

Scheduling hierarchy in a traffic manager of a network processor

Dynamic updating of scheduling hierarchy in a traffic manager of a network processor

Local messaging in a scheduling hierarchy in a traffic manager of a network processor

Packet draining from a scheduling hierarchy in a traffic manager of a network processor

Packet draining from a scheduling hierarchy in a traffic manager of a network processor

Shared task parameters in a scheduler of a network processor

SONNIER DAVID

Byte-accurate scheduling in a network processor

Packet scheduling with guaranteed minimum rate in a traffic manager of a network processor

Root scheduling algorithm in a network processor

Tracking written addresses of a shared memory of a multi-core processor

NEMAWARKAR SHASHANK

Multithreaded, superscalar scheduling in a traffic manager of a network processor

MITAL DEEPAK

Memory manager for a network communications processor architecture