Inventor
WILLIAMS DOUGLAS D
US19 patents
⚠️ This page may combine multiple inventors who share the name “WILLIAMS DOUGLAS D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
DIGITAL EQUIPMENT CORP
15 patentsUS5148536ASep 15, 1992
Pipeline having an integral cache which processes cache misses and loads data in parallel
DIGITAL EQUIPMENT CORP126 citations97
US4937733AJun 26, 1990
Method and apparatus for assuring adequate access to system resources by processors in a multiprocessor computer system
DIGITAL EQUIPMENT CORP69 citations96
US4858116AAug 15, 1989
Method and apparatus for managing multiple lock indicators in a multiprocessor computer system
DIGITAL EQUIPMENT CORP75 citations96
US5430888AJul 4, 1995
Pipeline utilizing an integral cache for transferring data to and from a register
DIGITAL EQUIPMENT CORP65 citations94
US5428794AJun 27, 1995
Interrupting node for providing interrupt requests to a pended bus
DIGITAL EQUIPMENT CORP25 citations92
US5146597ASep 8, 1992
Apparatus and method for servicing interrupts utilizing a pended bus
DIGITAL EQUIPMENT CORP40 citations92
US5068781ANov 26, 1991
Method and apparatus for managing multiple lock indicators in a multiprocessor computer system
DIGITAL EQUIPMENT CORP37 citations92
US4953072AAug 28, 1990
Node for servicing interrupt request messages on a pended bus
DIGITAL EQUIPMENT CORP46 citations92
US4949239AAug 14, 1990
System for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer system
DIGITAL EQUIPMENT CORP46 citations92
US4941083AJul 10, 1990
Method and apparatus for initiating interlock read transactions on a multiprocessor computer system
DIGITAL EQUIPMENT CORP29 citations92
US4774422ASep 27, 1988
High speed low pin count bus interface
DIGITAL EQUIPMENT CORP33 citations92
US5179674AJan 12, 1993
Method and apparatus for predicting valid performance of virtual-address to physical-address translations
DIGITAL EQUIPMENT CORP29 citations91
US5341510AAug 23, 1994
Commander node method and apparatus for assuring adequate access to system resources in a multiprocessor
DIGITAL EQUIPMENT CORP12 citations74
US4829515AMay 9, 1989
High performance low pin count bus interface
DIGITAL EQUIPMENT CORP14 citations73
US5319791AJun 7, 1994
System for predicting memory fault in vector processor by sensing indication signal to scalar processor to continue a next vector instruction issuance
DIGITAL EQUIPMENT CORP6 citations72
IBM
4 patentsUS9628609B2Apr 18, 2017
Device function disablement during vehicle motion
IBM8 citations84
US9270809B2Feb 23, 2016
Device function disablement during vehicle motion
IBM9 citations84
US10397396B2Aug 27, 2019
Device function disablement during vehicle motion
IBM3 citations73
US10063687B2Aug 28, 2018
Device function disablement during vehicle motion
IBM3 citations73