Inventor

FENWICK DAVID M

US17 patents

⚠️ This page may combine multiple inventors who share the name “FENWICK DAVID M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FENWICK DAVID M

DIGITAL EQUIPMENT CORP

Method and apparatus for adaptive memory access

Delay compensated signal propagation

Pipeline having an integral cache which processes cache misses and loads data in parallel

Method and apparatus for performing atomic transactions in a shared memory multi processor system

Package for EMI, ESD, thermal, and mechanical shock protection of circuit chips

Pipeline utilizing an integral cache for transferring data to and from a register

Distributed data bus sequencing for a system bus with separate address and data bus protocols

Distributed data bus sequencing for a system bus with separate address and data bus protocols

Clock architecture for synchronous system bus which regulates and adjusts clock skew

Memory bank addressing scheme

Method and apparatus for predicting valid performance of virtual-address to physical-address translations

Arbitration unit which requests control of the system bus prior to determining whether such control is required

System bus with separate address and data bus protocols

System for predicting memory fault in vector processor by sensing indication signal to scalar processor to continue a next vector instruction issuance

COMPAQ COMPUTER CORP

Order supporting mechanisms for use in a switch-based multi-processor system

Apparatus for determining memory bank availability in a computer system

Distributed early arbitration