Inventor

GAUTHIER CLAUDE

US44 patents

⚠️ This page may combine multiple inventors who share the name “GAUTHIER CLAUDE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GAUTHIER CLAUDE

SUN MICROSYSTEMS INC

Using a push/pull buffer to improve delay locked loop performance

Duty cycle corrector

Chip/package resonance damping using controlled package series resistance

Design-for-test technique for a delay locked loop

Quantifying a difference between nodal voltages

Method for optimizing loop bandwidth in delay locked loops

Adjustable capacitances for DLL loop and power supply noise filters

Programmable bias-generator for self-biasing a delay locked loop

Integrated on-chip process, temperature, and voltage sensor module

Jitter estimation for a phase locked loop

Method for decoupling capacitor optimization for a temperature sensor design

Optimization of loop bandwidth for a phase locked loop

Circuit for post-silicon control of delay locked loop charge pump current

Increasing power supply noise rejection using linear voltage regulators in an on-chip temperature sensor

Post-silicon phase offset control of phase locked loop input receiver

Delay locked loop design with diode for loop filter capacitance leakage current control

Method and system for estimating jitter in a delay locked loop

Post-silicon control of phase locked loop charge pump current

Post-silicon control of an embedded temperature sensor

Adjustment and calibration system for post-fabrication treatment of on-chip temperature sensor

Low voltage temperature-independent and temperature-dependent voltage generator

Phase locked loop design with diode for loop filter capacitance leakage current control

Phase locked loop input receiver design with delay matching feature

Method and apparatus for calibration of a post-fabrication bias voltage tuning feature for self biasing phase locked loop

Method for simulating power supply noise in an on-chip temperature sensor

Post-silicon bias-generator control for a differential phase locked loop

I/O interface anti-resonance passband shunting technique

Digital delay locked loop with extended phase capture range

ATI TECHNOLOGIES INC

Asymmetrical IO method and system

Bit-deskewing IO method and system

Method and system for communicated client phase information during an idle period of a data bus

ALCOA INC

3 component cathode collector bar

Cathode collector bar with spacer for improved heat balance and method

Process and apparatus for positioning replacement anodes in electrolytic cells

ADVANCED MICRO DEVICES INC

Error detection in high-speed asymmetric interfaces

Low power mode unipolar current/voltage mode interface

CIT ALCATEL

Device for protecting a direct current electrical power supply from disturbances caused by connecting to it or disconnecting from it an electronic system

Current limiter and an optical receiver making use thereof

MACRI JOSEPH

Error detection in high-speed asymmetric interfaces utilizing dedicated interface lines

Error detection in high-speed asymmetric interfaces

ERICSSON TELEFON AB L M

Method and apparatus for reselection of data trunk upon connection failure

GAUTHIER CLAUDE

Identifying a wireless device of a target user for communication interception based on individual usage pattern(S)

MOREIN STEPHEN

System and apparatus for transmitting phase information from a client to a host between read and write operations

GAUDET SAMUEL

Musical string networks