Inventor
LOH LAWRENCE
US16 patents
⚠️ This page may combine multiple inventors who share the name “LOH LAWRENCE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
JASPER DESIGN AUTOMATION INC
6 patentsUS7418678B1Aug 26, 2008
Managing formal verification complexity of designs with counters
JASPER DESIGN AUTOMATION INC21 citations90
US9449196B1Sep 20, 2016
Security data path verification
JASPER DESIGN AUTOMATION INC15 citations88
US7647572B1Jan 12, 2010
Managing formal verification complexity of designs with multiple related counters
JASPER DESIGN AUTOMATION INC9 citations83
US7237208B1Jun 26, 2007
Managing formal verification complexity of designs with datapaths
JASPER DESIGN AUTOMATION INC14 citations81
US9104824B1Aug 11, 2015
Power aware retention flop list analysis and modification
JASPER DESIGN AUTOMATION INC9 citations79
US8954904B1Feb 10, 2015
Veryifing low power functionality through RTL transformation
JASPER DESIGN AUTOMATION INC8 citations79
CADENCE DESIGN SYSTEMS INC
4 patentsUS10204201B1Feb 12, 2019
Methods, systems, and articles of manufacture for verifying an electronic design using hierarchical clock domain crossing verification techniques
CADENCE DESIGN SYSTEMS INC12 citations79
US9922209B1Mar 20, 2018
Security data path verification
CADENCE DESIGN SYSTEMS INC3 citations68
US9633151B1Apr 25, 2017
Methods, systems, and computer program product for verifying electronic designs with clock domain crossing paths
CADENCE DESIGN SYSTEMS INC5 citations68
US9934410B1Apr 3, 2018
Security data path verification
CADENCE DESIGN SYSTEMS INC0 citations48
JASPER DESIGN AUTOMATION
3 patentsUS7159198B1Jan 2, 2007
System and method for identifying design efficiency and effectiveness parameters for verifying properties of a circuit model
JASPER DESIGN AUTOMATION63 citations96
US8381148B1Feb 19, 2013
Formal verification of deadlock property
JASPER DESIGN AUTOMATION35 citations91
US7437694B1Oct 14, 2008
System and method for determining and identifying signals that are relevantly determined by a selected signal in a circuit design
JASPER DESIGN AUTOMATION21 citations91