Inventor
WU CHIH-TA
TW22 patents
⚠️ This page may combine multiple inventors who share the name “WU CHIH-TA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG
11 patentsUS6803291B1Oct 12, 2004
Method to preserve alignment mark optical integrity
TAIWAN SEMICONDUCTOR MFG32 citations89
US6777336B2Aug 17, 2004
Method of forming a shallow trench isolation structure
TAIWAN SEMICONDUCTOR MFG13 citations84
US7199001B2Apr 3, 2007
Method of forming MIM capacitor electrodes
TAIWAN SEMICONDUCTOR MFG7 citations74
US7180116B2Feb 20, 2007
Self-aligned metal electrode to eliminate native oxide effect for metal insulator semiconductor (MIS) capacitor
TAIWAN SEMICONDUCTOR MFG7 citations73
US7202130B2Apr 10, 2007
Spacer for a split gate flash memory cell and a memory cell employing the same
TAIWAN SEMICONDUCTOR MFG4 citations63
US7172908B2Feb 6, 2007
Magnetic memory cells and manufacturing methods
TAIWAN SEMICONDUCTOR MFG2 citations63
US7169713B2Jan 30, 2007
Atomic layer deposition (ALD) method with enhanced deposition rate
TAIWAN SEMICONDUCTOR MFG6 citations63
US7851324B2Dec 14, 2010
Method of forming metal-insulator-metal structure
TAIWAN SEMICONDUCTOR MFG4 citations62
US7554145B2Jun 30, 2009
Magnetic memory cells and manufacturing methods
TAIWAN SEMICONDUCTOR MFG0 citations52
US7622347B2Nov 24, 2009
Self-aligned metal electrode to eliminate native oxide effect for metal insulator semiconductor (MIS) capacitor
TAIWAN SEMICONDUCTOR MFG0 citations51
US7786552B2Aug 31, 2010
Semiconductor device having hydrogen-containing layer
TAIWAN SEMICONDUCTOR MFG0 citations41
MOSEL VITELIC INC
5 patentsUS6265269B1Jul 24, 2001
Method for fabricating a concave bottom oxide in a trench
MOSEL VITELIC INC121 citations95
US6150238ANov 21, 2000
Method for fabricating a trench isolation
MOSEL VITELIC INC30 citations87
US6090725AJul 18, 2000
Method for preventing bubble defects in BPSG film
MOSEL VITELIC INC15 citations68
US6265233B1Jul 24, 2001
Method for determining crack limit of film deposited on semiconductor wafer
MOSEL VITELIC INC2 citations55
US6242365B1Jun 5, 2001
Method for preventing film deposited on semiconductor wafer from cracking
MOSEL VITELIC INC0 citations45