Inventor
SADAKA MARIAM G
US39 patents
⚠️ This page may combine multiple inventors who share the name “SADAKA MARIAM G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
FREESCALE SEMICONDUCTOR INC
33 patentsUS7226833B2Jun 5, 2007
Semiconductor device structure and method therefor
FREESCALE SEMICONDUCTOR INC124 citations99
US7575968B2Aug 18, 2009
Inverse slope isolation and dual surface orientation integration
FREESCALE SEMICONDUCTOR INC533 citations97
US7282402B2Oct 16, 2007
Method of making a dual strained channel semiconductor device
FREESCALE SEMICONDUCTOR INC69 citations97
US7018901B1Mar 28, 2006
Method for forming a semiconductor device having a strained channel and a heterojunction source/drain
FREESCALE SEMICONDUCTOR INC105 citations97
US6893947B2May 17, 2005
Advanced RF enhancement-mode FETs with improved gate properties
FREESCALE SEMICONDUCTOR INC124 citations97
US7575975B2Aug 18, 2009
Method for forming a planar and vertical semiconductor structure having a strained semiconductor layer
FREESCALE SEMICONDUCTOR INC34 citations93
US7524707B2Apr 28, 2009
Modified hybrid orientation technology
FREESCALE SEMICONDUCTOR INC19 citations93
US7037795B1May 2, 2006
Low RC product transistors in SOI semiconductor process
FREESCALE SEMICONDUCTOR INC26 citations93
US7435639B2Oct 14, 2008
Dual surface SOI by lateral epitaxial overgrowth
FREESCALE SEMICONDUCTOR INC34 citations92
US7208357B2Apr 24, 2007
Template layer formation
FREESCALE SEMICONDUCTOR INC18 citations92
US7067868B2Jun 27, 2006
Double gate device having a heterojunction source/drain and strained channel
FREESCALE SEMICONDUCTOR INC39 citations92
US7029980B2Apr 18, 2006
Method of manufacturing SOI template layer
FREESCALE SEMICONDUCTOR INC25 citations92
US7803670B2Sep 28, 2010
Twisted dual-substrate orientation (DSO) substrates
FREESCALE SEMICONDUCTOR INC19 citations84
US7205210B2Apr 17, 2007
Semiconductor structure having strained semiconductor and method therefor
FREESCALE SEMICONDUCTOR INC16 citations84
US7163903B2Jan 16, 2007
Method for making a semiconductor structure using silicon germanium
FREESCALE SEMICONDUCTOR INC10 citations84
US7160769B2Jan 9, 2007
Channel orientation to enhance transistor performance
FREESCALE SEMICONDUCTOR INC10 citations84
US7378306B2May 27, 2008
Selective silicon deposition for planarized dual surface orientation integration
FREESCALE SEMICONDUCTOR INC14 citations82
US7821067B2Oct 26, 2010
Electronic devices including a semiconductor layer
FREESCALE SEMICONDUCTOR INC11 citations81
US7265004B2Sep 4, 2007
Electronic devices including a semiconductor layer and a process for forming the same
FREESCALE SEMICONDUCTOR INC15 citations81
US6803248B2Oct 12, 2004
Chemistry for etching quaternary interface layers on InGaAsP mostly formed between GaAs and InxGa(1-x)P layers
FREESCALE SEMICONDUCTOR INC12 citations74
US7056778B2Jun 6, 2006
Semiconductor layer formation
FREESCALE SEMICONDUCTOR INC7 citations72
US7781840B2Aug 24, 2010
Semiconductor device structure
FREESCALE SEMICONDUCTOR INC4 citations63
US7615806B2Nov 10, 2009
Method for forming a semiconductor structure and structure thereof
FREESCALE SEMICONDUCTOR INC6 citations63
US7544548B2Jun 9, 2009
Trench liner for DSO integration
FREESCALE SEMICONDUCTOR INC6 citations63
US7402477B2Jul 22, 2008
Method of making a multiple crystal orientation semiconductor device
FREESCALE SEMICONDUCTOR INC4 citations63
US7241647B2Jul 10, 2007
Graded semiconductor layer
FREESCALE SEMICONDUCTOR INC5 citations63
US7754587B2Jul 13, 2010
Silicon deposition over dual surface orientation substrates to promote uniform polishing
FREESCALE SEMICONDUCTOR INC4 citations62
US7700420B2Apr 20, 2010
Integrated circuit with different channel materials for P and N channel transistors and method therefor
FREESCALE SEMICONDUCTOR INC3 citations62
US7927956B2Apr 19, 2011
Method for making a semiconductor structure using silicon germanium
FREESCALE SEMICONDUCTOR INC0 citations52
US7811382B2Oct 12, 2010
Method for forming a semiconductor structure having a strained silicon layer
FREESCALE SEMICONDUCTOR INC1 citations52
US6855965B2Feb 15, 2005
Method of manufacturing a semiconductor component and semiconductor component thereof
FREESCALE SEMICONDUCTOR INC0 citations52
US7419866B2Sep 2, 2008
Process of forming an electronic device including a semiconductor island over an insulating layer
FREESCALE SEMICONDUCTOR INC0 citations42
US7560318B2Jul 14, 2009
Process for forming an electronic device including semiconductor layers having different stresses
FREESCALE SEMICONDUCTOR INC0 citations41
MOTOROLA INC
3 patentsUS6368929B1Apr 9, 2002
Method of manufacturing a semiconductor component and semiconductor component thereof
MOTOROLA INC16 citations92
US6465297B1Oct 15, 2002
Method of manufacturing a semiconductor component having a capacitor
MOTOROLA INC18 citations84
US6919590B2Jul 19, 2005
Heterojunction bipolar transistor with monolithically integrated junction field effect transistor and method of manufacturing same
MOTOROLA INC7 citations71