Inventor

PENTAKOTA VISVESVARAYA A

IN32 patents

⚠️ This page may combine multiple inventors who share the name “PENTAKOTA VISVESVARAYA A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PENTAKOTA VISVESVARAYA A

TEXAS INSTRUMENTS INC

Dummy delay line based DLL and method for clocking in pipeline ADC

Calibrating capacitor mismatch in a pipeline ADC

amplifying signals in switched capacitor environments

Reducing noise and/or power consumption in a switched capacitor amplifier sampling a reference voltage

Correction of sampling mismatch in time-interleaved analog-to-digital converters

Reducing variation in reference voltage when the load varies dynamically

Clamping circuit

Providing reference voltage with desired accuracy in a short duration to a dynamically varying load

Reducing noise in switched capacitor amplifier circuit

Correcting offset errors associated with a sub-ADC in pipeline analog to digital converters

Applying desired voltage at a node

High speed gain amplifier and method in ADCs

Pipeline ADC and reference load balancing circuit and method to balance reference circuit load

Generating multiple delayed signals of different phases from a reference signal using delay locked loop (DLL)

Calibration scheme for a non-linear ADC

Analog-to-digital converter (ADC) having linearization circuit with reconfigurable lookup table (LUT) memory and calibration options

Reducing the effect of noise present along with an input signal when sampling the input signal

Multi-stage analog to digital converter architecture

Bandwidth limited sampling circuit of high linearity

Minimizing changes in the amplification factor of an amplification circuit during operation

Calibration scheme for a non-linear ADC

Noise-shaping of additive dither in analog-to-digital converters

Apparatus for correcting setting error in an MDAC amplifier

Enhancing SNR and throughput performance of integrated circuits

Reducing droop in a reference signal provided to ADCs

Closed loop amplification with high throughput performance

Multibit recyclic pipelined ADC architecture

Low noise output buffer

Analog-to-digital converter (ADC) having linearization circuit with reconfigurable lookup table (LUT) memory and calibration options

AGARWAL NITIN

Source follower input buffer

PENTAKOTA VISVESVARAYA A

Low power clocking scheme for a pipelined ADC

TEXAS INSTR INDIA PRIVATE LTD

Reducing the time to convert an analog input sample to a digital code in an analog to digital converter (ADC)