Inventor
O'BRIEN KATHRYN M
US43 patents
⚠️ This page may combine multiple inventors who share the name “O'BRIEN KATHRYN M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
21 patentsUS7512745B2Mar 31, 2009
Method for garbage collection in heterogeneous multiprocessor systems
IBM40 citations92
US7493452B2Feb 17, 2009
Method to efficiently prefetch and batch compiler-assisted software cache accesses
IBM39 citations92
US7243333B2Jul 10, 2007
Method and apparatus for creating and executing integrated executables in a heterogeneous architecture
IBM27 citations92
US7243195B2Jul 10, 2007
Software managed cache optimization system and method for multi-processing systems
IBM20 citations92
US7225431B2May 29, 2007
Method and apparatus for setting breakpoints when debugging integrated executables in a heterogeneous architecture
IBM22 citations92
US7200840B2Apr 3, 2007
Method and apparatus for enabling access to global data by a plurality of codes in an integrated executable for a heterogeneous architecture
IBM23 citations92
US10169013B2Jan 1, 2019
Arranging binary code based on call graph partitioning
IBM5 citations84
US8375374B2Feb 12, 2013
Partitioning programs between a general purpose core and one or more accelerators
IBM10 citations84
US8056065B2Nov 8, 2011
Stable transitions in the presence of conditionals for an advanced dual-representation polyhedral loop transformation framework
IBM9 citations84
US8006238B2Aug 23, 2011
Workload partitioning in a parallel system with hetergeneous alignment constraints
IBM7 citations84
US7487496B2Feb 3, 2009
Computer program functional partitioning method for heterogeneous multi-processing systems
IBM8 citations84
US7478376B2Jan 13, 2009
Computer program code size partitioning method for multiple memory multi-processing systems
IBM11 citations84
US7222332B2May 22, 2007
Method and apparatus for overlay management within an integrated executable for a heterogeneous architecture
IBM11 citations84
US7962906B2Jun 14, 2011
Compiler method for employing multiple autonomous synergistic processors to simultaneously operate on longer vectors of data
IBM16 citations83
US7213123B2May 1, 2007
Method and apparatus for mapping debugging information when debugging integrated executables in a heterogeneous architecture
IBM8 citations74
US10223260B2Mar 5, 2019
Compiler-generated memory mapping hints
IBM2 citations73
US9916144B2Mar 13, 2018
Arranging binary code based on call graph partitioning
IBM1 citations63
US8037463B2Oct 11, 2011
Computer program functional partitioning system for heterogeneous multi-processing systems
IBM2 citations63
US8032873B2Oct 4, 2011
Computer program code size partitioning system for multiple memory multi-processing systems
IBM2 citations63
US10324694B2Jun 18, 2019
Arranging binary code based on call graph partitioning
IBM0 citations52
US8010957B2Aug 30, 2011
Compiler for eliminating redundant read-modify-write code sequences in non-vectorizable code
IBM1 citations52
CHEN TONG
9 patentsUS8522225B2Aug 27, 2013
Rewriting branch instructions using branch stubs
CHEN TONG18 citations92
US8782381B2Jul 15, 2014
Dynamically rewriting branch instructions in response to cache line eviction
CHEN TONG7 citations84
US8713548B2Apr 29, 2014
Rewriting branch instructions using branch stubs
CHEN TONG6 citations84
US8631225B2Jan 14, 2014
Dynamically rewriting branch instructions to directly target an instruction cache location
CHEN TONG7 citations84
US8561044B2Oct 15, 2013
Optimized code generation targeting a high locality software cache
CHEN TONG15 citations84
US8516230B2Aug 20, 2013
SPE software instruction cache
CHEN TONG10 citations83
US9459851B2Oct 4, 2016
Arranging binary code based on call graph partitioning
CHEN TONG3 citations73
US8627051B2Jan 7, 2014
Dynamically rewriting branch instructions to directly target an instruction cache location
CHEN TONG5 citations73
US9600253B2Mar 21, 2017
Arranging binary code based on call graph partitioning
CHEN TONG1 citations62
EICHENBERGER ALEXANDRE E
8 patentsUS8087010B2Dec 27, 2011
Selective code generation optimization for an advanced dual-representation polyhedral loop transformation framework
EICHENBERGER ALEXANDRE E57 citations97
US8087011B2Dec 27, 2011
Domain stretching for an advanced dual-representation polyhedral loop transformation framework
EICHENBERGER ALEXANDRE E20 citations92
US8464271B2Jun 11, 2013
Runtime dependence-aware scheduling using assist thread
EICHENBERGER ALEXANDRE E15 citations84
US8060870B2Nov 15, 2011
System and method for advanced polyhedral loop transformations of source code in a compiler
EICHENBERGER ALEXANDRE E8 citations84
US8667260B2Mar 4, 2014
Building approximate data dependences with a moving window
EICHENBERGER ALEXANDRE E14 citations83
US8468539B2Jun 18, 2013
Tracking and detecting thread dependencies using speculative versioning cache
EICHENBERGER ALEXANDRE E5 citations73
US8214831B2Jul 3, 2012
Runtime dependence-aware scheduling using assist thread
EICHENBERGER ALEXANDRE E3 citations62
US8397052B2Mar 12, 2013
Version pressure feedback mechanisms for speculative versioning caches
EICHENBERGER ALEXANDRE E0 citations42