Inventor
SCHROEDER UWE
DE32 patents
⚠️ This page may combine multiple inventors who share the name “SCHROEDER UWE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INFINEON TECHNOLOGIES AG
18 patentsUS6599798B2Jul 29, 2003
Method of preparing buried LOCOS collar in trench DRAMS
INFINEON TECHNOLOGIES AG26 citations93
US6740555B1May 25, 2004
Semiconductor structures and manufacturing methods
INFINEON TECHNOLOGIES AG16 citations92
US6620724B1Sep 16, 2003
Low resistivity deep trench fill for DRAM and EDRAM applications
INFINEON TECHNOLOGIES AG23 citations92
US6426253B1Jul 30, 2002
Method of forming a vertically oriented device in an integrated circuit
INFINEON TECHNOLOGIES AG49 citations92
US6335247B1Jan 1, 2002
Integrated circuit vertical trench device and method of forming thereof
INFINEON TECHNOLOGIES AG25 citations92
US6693016B2Feb 17, 2004
Method of fabricating a trench-structure capacitor device
INFINEON TECHNOLOGIES AG21 citations91
US7344953B2Mar 18, 2008
Process for vertically patterning substrates in semiconductor process technology by means of inconformal deposition
INFINEON TECHNOLOGIES AG19 citations84
US6486024B1Nov 26, 2002
Integrated circuit trench device with a dielectric collar stack, and method of forming thereof
INFINEON TECHNOLOGIES AG14 citations84
US7307735B2Dec 11, 2007
Method for determining the depth of a buried structure
INFINEON TECHNOLOGIES AG16 citations83
US6953722B2Oct 11, 2005
Method for patterning ceramic layers
INFINEON TECHNOLOGIES AG16 citations83
US6740595B2May 25, 2004
Etch process for recessing polysilicon in trench structures
INFINEON TECHNOLOGIES AG16 citations83
US7157371B2Jan 2, 2007
Barrier layer and a method for suppressing diffusion processes during the production of semiconductor devices
INFINEON TECHNOLOGIES AG9 citations74
US6605860B1Aug 12, 2003
Semiconductor structures and manufacturing methods
INFINEON TECHNOLOGIES AG10 citations73
US7176514B2Feb 13, 2007
Method and configuration for reinforcement of a dielectric layer at defects by self-aligning and self-limiting electrochemical conversion of a substrate material
INFINEON TECHNOLOGIES AG2 citations63
US6645839B2Nov 11, 2003
Method for improving a doping profile for gas phase doping
INFINEON TECHNOLOGIES AG3 citations59
US7268037B2Sep 11, 2007
Method for fabricating microchips using metal oxide masks
INFINEON TECHNOLOGIES AG0 citations52
US7531406B2May 12, 2009
Method for fabricating an electrical component
INFINEON TECHNOLOGIES AG0 citations48
US7358187B2Apr 15, 2008
Coating process for patterned substrate surfaces
INFINEON TECHNOLOGIES AG0 citations41
IBM
7 patentsUS6498061B2Dec 24, 2002
Negative ion implant mask formation for self-aligned, sublithographic resolution patterning for single-sided vertical device formation
IBM66 citations96
US6399490B1Jun 4, 2002
Highly conformal titanium nitride deposition process for high aspect ratio structures
IBM104 citations96
US6548357B2Apr 15, 2003
Modified gate processing for optimized definition of array and logic devices on same chip
IBM28 citations92
US6451662B1Sep 17, 2002
Method of forming low-leakage on-chip capacitor
IBM47 citations92
US6403423B1Jun 11, 2002
Modified gate processing for optimized definition of array and logic devices on same chip
IBM38 citations92
US6605838B1Aug 12, 2003
Process flow for thick isolation collar with reduced length
IBM39 citations90
US6613642B2Sep 2, 2003
Method for surface roughness enhancement in semiconductor capacitor manufacturing
IBM8 citations73
QIMONDA AG
3 patentsUS7723771B2May 25, 2010
Zirconium oxide based capacitor and process to manufacture the same
QIMONDA AG17 citations84
US7666752B2Feb 23, 2010
Deposition method for a transition-metal-containing dielectric
QIMONDA AG17 citations82
US8344438B2Jan 1, 2013
Electrode of an integrated circuit
QIMONDA AG6 citations72