Inventor

BHATT AJAY V

US27 patents

⚠️ This page may combine multiple inventors who share the name “BHATT AJAY V”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BHATT AJAY V

INTEL CORP

Method and apparatus for automatically configuring circuit cards in a computer system

System having independently addressable bus interfaces coupled to serially connected multi-ported signal distributors generating and maintaining frame based polling schedule favoring isochronous peripherals

Method and apparatus for control of power consumption in a computer system

M&amp;A for dynamically generating and maintaining frame based polling schedules for polling isochronous and asynchronous functions that guaranty latencies and bandwidths to the isochronous functions

Implementing scatter/gather operations in a direct memory access device on a personal computer

Method and apparatus for exchanging data, status, and commands over an hierarchical serial bus assembly using communication packets

System for assigning geographical addresses in a hierarchical serial bus by enabling upstream port and selectively enabling disabled ports at power on/reset

Using asymmetric lanes dynamically in a multi-lane serial link

Method and apparatus for automatically configuring circuit cards in a computer system

Unified multi-transport medium connector architecture

M&amp;A for exchanging date, status and commands over an hierarchical serial bus assembly using communication packets

Atomic operations in PCI express

PCI express transaction descriptor

Transaction re-ordering

Prefectching in PCI express

Transaction layer packet compression

Point-to-point link negotiation method and apparatus

Method and apparatus for meeting compliance for debugging and testing a multi-speed, point-to-point link

Modular power adaptor with a base modular unit having plurality of surface connectors for connection to a power source

Providing hardware support for shared virtual memory between local and remote physical memory

Transaction layer packet formatting

Fast inking a touch display

Multimodal interface

CHANDRA PRASHANT R

Unified connector architecture

Unified multi-transport medium connector architecture

CHINYA GAUTHAM N

Providing hardware support for shared virtual memory between local and remote physical memory

TRETHEWEY JAMES R

Sensor and context based adjustment of the operation of a network controller

M&A for dynamically generating and maintaining frame based polling schedules for polling isochronous and asynchronous functions that guaranty latencies and bandwidths to the isochronous functions

M&A for exchanging date, status and commands over an hierarchical serial bus assembly using communication packets