Inventor

CHAKRABARTI BARSNEYA

IN5 patents

⚠️ This page may combine multiple inventors who share the name “CHAKRABARTI BARSNEYA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SYNOPSYS INC

4 patents

US12475231B1Nov 18, 2025

Hardware security checks in static verification of integrated circuit designs

SYNOPSYS INC0 citations57

US9201992B2Dec 1, 2015

Method and apparatus using formal methods for checking generated-clock timing definitions

SYNOPSYS INC1 citations48

US9721058B2Aug 1, 2017

System and method for reactive initialization based formal verification of electronic logic design

SYNOPSYS INC1 citations46

US10599800B2Mar 24, 2020

Formal clock network analysis, visualization, verification and generation

SYNOPSYS INC0 citations42

ATRENTA INC

1 patent

US8656328B1Feb 18, 2014

System and method for abstraction of a circuit portion of an integrated circuit

ATRENTA INC0 citations35