Inventor
JAIN PARAS MAL
US13 patents
⚠️ This page may combine multiple inventors who share the name “JAIN PARAS MAL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SYNOPSYS INC
9 patentsUS11467851B1Oct 11, 2022
Machine learning (ML)-based static verification for derived hardware-design elements
SYNOPSYS INC3 citations72
US10387605B2Aug 20, 2019
System and method for managing and composing verification engines
SYNOPSYS INC4 citations67
US12026202B2Jul 2, 2024
Memory optimization for storing objects in nested hash maps used in electronic design automation systems
SYNOPSYS INC0 citations59
US12475231B1Nov 18, 2025
Hardware security checks in static verification of integrated circuit designs
SYNOPSYS INC0 citations57
US11403450B2Aug 2, 2022
Convergence centric coverage for clock domain crossing (CDC) jitter in simulation
SYNOPSYS INC0 citations56
US11347917B2May 31, 2022
Determining and verifying metastability in clock domain crossings
SYNOPSYS INC1 citations54
US11087059B2Aug 10, 2021
Clock domain crossing verification of integrated circuit design using parameter inference
SYNOPSYS INC0 citations53
US11907631B2Feb 20, 2024
Reset domain crossing detection and simulation
SYNOPSYS INC0 citations45
US12481812B1Nov 25, 2025
Multi-machine version independent hierarchical verification
SYNOPSYS INC0 citations39