Inventor
YAP WENG F
US27 patents
⚠️ This page may combine multiple inventors who share the name “YAP WENG F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
YAP WENG F
11 patentsUS9299670B2Mar 29, 2016
Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
YAP WENG F39 citations94
US9281284B2Mar 8, 2016
System-in-packages having vertically-interconnected leaded components and methods for the fabrication thereof
YAP WENG F11 citations84
US9281286B1Mar 8, 2016
Microelectronic packages having texturized solder pads and methods for the fabrication thereof
YAP WENG F7 citations83
US9129981B2Sep 8, 2015
Methods for the production of microelectronic packages having radiofrequency stand-off layers
YAP WENG F11 citations82
US9997492B2Jun 12, 2018
Optically-masked microelectronic packages and methods for the fabrication thereof
YAP WENG F2 citations73
US9257419B2Feb 9, 2016
Leadframe-based system-in-packages having sidewall-mounted surface mount devices and methods for the production thereof
YAP WENG F5 citations73
US9024429B2May 5, 2015
Microelectronic packages containing opposing devices and methods for the fabrication thereof
YAP WENG F6 citations73
US9401339B2Jul 26, 2016
Wafer level packages having non-wettable solder collars and methods for the fabrication thereof
YAP WENG F3 citations72
US8963318B2Feb 24, 2015
Packaged semiconductor device
YAP WENG F2 citations62
US9524950B2Dec 20, 2016
Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
YAP WENG F1 citations52
US8741666B1Jun 3, 2014
Methods relating to intermetallic testing of bond integrity between bond pads and copper-containing bond wires
YAP WENG F0 citations36
FREESCALE SEMICONDUCTOR INC
10 patentsUS9396999B2Jul 19, 2016
Wafer level packaging method
FREESCALE SEMICONDUCTOR INC46 citations98
US9698104B2Jul 4, 2017
Integrated electronic package and stacked assembly thereof
FREESCALE SEMICONDUCTOR INC37 citations94
US9761569B2Sep 12, 2017
Leadframe-based system-in-packages having sidewall-mounted surface mount devices and methods for the production thereof
FREESCALE SEMICONDUCTOR INC5 citations84
US9607918B2Mar 28, 2017
Fan-out wafer level packages containing embedded ground plane interconnect structures and methods for the fabrication thereof
FREESCALE SEMICONDUCTOR INC13 citations84
US9595509B1Mar 14, 2017
Stacked microelectronic package assemblies and methods for the fabrication thereof
FREESCALE SEMICONDUCTOR INC10 citations84
US9472528B2Oct 18, 2016
Integrated electronic package and method of fabrication
FREESCALE SEMICONDUCTOR INC8 citations84
US9589909B1Mar 7, 2017
Radio frequency and electromagnetic interference shielding in wafer level packaging using redistribution layers
FREESCALE SEMICONDUCTOR INC9 citations82
US9780077B2Oct 3, 2017
System-in-packages containing preassembled surface mount device modules and methods for the production thereof
FREESCALE SEMICONDUCTOR INC0 citations52
US9343414B2May 17, 2016
Microelectronic packages having radio frequency stand-off layers
FREESCALE SEMICONDUCTOR INC0 citations50
US9312206B2Apr 12, 2016
Semiconductor package with thermal via and method for fabrication thereof
FREESCALE SEMICONDUCTOR INC0 citations42
VINCENT MICHAEL B
2 patentsUS9305911B2Apr 5, 2016
Devices and stacked microelectronic packages with package surface conductors and adjacent trenches and methods of their fabrication
VINCENT MICHAEL B3 citations73
US9502363B2Nov 22, 2016
Wafer level packages and methods for producing wafer level packages having delamination-resistant redistribution layers
VINCENT MICHAEL B4 citations71