Inventor

LEE CHENG-CHIN

TW58 patents

⚠️ This page may combine multiple inventors who share the name “LEE CHENG-CHIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE CHENG-CHIN

TAIWAN SEMICONDUCTOR MFG CO LTD

Interconnect structure

Interconnect structure and method for forming the same

Semiconductor device comprising etch stop layer over dielectric layer and method of manufacture

Method of forming semiconductor device comprising conductive feature, dielectric layer adjacent conductive feature, and etch stop layer on top surface of dielectric layer

Semiconductor device comprising cap layer over dielectric layer and method of manufacture

Dielectric capping structure overlying a conductive structure to increase stability

Dielectric capping structure overlying a conductive structure to increase stability

Capping layer overlying dielectric structure to increase reliability

Interconnect strucutre with protective etch-stop

Dielectric capping structure overlying a conductive structure to increase stability

Metal capping layer and methods thereof

Methods for fabricating a low-resistance interconnect

Selective deposition method for forming semiconductor structure

Semiconductor device structure and methods of forming the same

Semiconductor interconnection structure and methods of forming the same

Interconnect structure with protective etch-stop

Selective deposition for integrated circuit interconnect structures

Interconnect structure and method for forming the same

Self-align via structure by selective deposition

Interconnect structures including air gaps

Method of providing a workpiece including low resistance interconnect low-resistance interconnect

Semiconductor device structure having air gap and methods of forming the same

Using a self-assembly layer to facilitate selective formation of an etching stop layer

Interconnect structure

Interconnect structure

Selective deposition for integrated circuit interconnect structures

Interconnect strucutre with protective etch-stop

Metal capping layer and methods thereof

Semiconductor structure including low-resistance interconnect and integrated circuit device having the same

Self-aligned via structure by selective deposition

Metal capping layer and methods thereof

Method for manufacturing interconnect structures including air gaps

Selective deposition for integrated circuit interconnect structures

Interconnect structure and method for forming the same

Using a self-assembly layer to facilitate selective formation of an etching stop layer

Semiconductor interconnection structure and methods of forming the same

Semiconductor device having metallization layer with low capacitance and method for manufacturing the same

Semiconductor device structure and methods of forming the same

Semiconductor device structure having air gap and methods of forming the same

Semiconductor interconnection structures and methods of forming the same

Thermal interconnect structure for thermal management of electrical interconnect structure

Semiconductor structure having dielectric-on-dielectric structure and method for forming the semiconductor structure

Interconnect structure and methods of forming the same

Semiconductor device structure and methods of forming the same

Semiconductor device having metallization layer with low capacitance and method for manufacturing the same

Semiconductor device structure and methods of forming the same

Barrier and air-gap scheme for high performance interconnects

Capping layer overlying dielectric structure to increase reliability

Thermal interconnect structure for thermal management of electrical interconnect structure

FIRST CUBE PTE LTD

System and method for facilitating delivery and return service