Inventor

MURI INGO

AT37 patents

⚠️ This page may combine multiple inventors who share the name “MURI INGO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MURI INGO

INFINEON TECHNOLOGIES AG

Semiconductor chip including self-aligned, back-side conductive layer and method for making the same

Semiconductor device and semiconductor wafer including a porous layer and method of manufacturing

Devices with backside metal structures and methods of formation thereof

Method of wafer thinning and realizing backside metal structures

Method for partially removing a semiconductor wafer

Method for providing a planarizable workpiece support, a workpiece planarization arrangement, and a chuck

Semiconductor chip including back-side conductive layer

Semiconductor device including an electrical contact with a metal layer arranged thereon

Devices with backside metal structures and methods of formation thereof

Semiconductor device having semiconductor device elements in a semiconductor layer

Method of porosifying part of a semiconductor wafer

Semiconductor device and manufacturing method

Transistor device and method of manufacturing

Method of forming a semiconductor device and semiconductor device

Method for producing a semiconductor

Method for producing a semiconductor

Devices with backside metal structures and methods of formation thereof

Wafer contacting device, and arrangement and method for electrochemical etching of a wafer

Method for thinning substrates

Semiconductor arrangement including buried anodic oxide and manufacturing method

Method for manufacturing a semiconductor device comprising etching a semiconductor material

Monolithically integrated chip including active electrical components and passive electrical components with chip edge stabilization structures

Method for planarizing one or more workpieces, a workpiece planarization arrangement, a chuck and a replaceable workpiece-support for a chuck

Semiconductor device and methods for forming a plurality of semiconductor devices

Substrates with buried isolation layers and methods of formation thereof

Method of forming a composite material and apparatus for forming a composite material

Reticle and exposure method including projection of a reticle pattern into neighboring exposure fields

INFINEON TECHNOLOGIES AUSTRIA AG

Method of manufacturing semiconductor chips having a side wall sealing

Method for producing a superjunction device

Power relay circuit

Superjunction transistor device and method for forming a superjunction transistor device

Method for producing a superjunction device

Power relay circuit

Superjunction transistor device

Method for forming a superjunction transistor device

Method for producing a superjunction device

Method for forming a superjunction transistor device