Inventor
PUDIYAPURA AJEER SALIL
US12 patents
⚠️ This page may combine multiple inventors who share the name “PUDIYAPURA AJEER SALIL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CAVIUM INC
8 patentsUS9870204B2Jan 16, 2018
Algorithm to achieve optimal layout of instruction tables for programmable network devices
CAVIUM INC3 citations82
US9836283B2Dec 5, 2017
Compiler architecture for programmable application specific integrated circuit based network devices
CAVIUM INC5 citations82
US9582251B2Feb 28, 2017
Algorithm to achieve optimal layout of decision logic elements for programmable network devices
CAVIUM INC5 citations82
US10466976B2Nov 5, 2019
Compiler architecture for programmable application specific integrated circuit based network devices
CAVIUM INC1 citations71
US9864582B2Jan 9, 2018
Code processor to build orthogonal execution blocks for programmable network devices
CAVIUM INC1 citations61
US9864584B2Jan 9, 2018
Code generator for programmable network devices
CAVIUM INC1 citations61
US9864583B2Jan 9, 2018
Algorithm to derive logic expression to select execution blocks for programmable network devices
CAVIUM INC0 citations50
US9606781B2Mar 28, 2017
Parser engine programming tool for programmable network devices
CAVIUM INC0 citations40
PENSANDO SYSTEMS INC
2 patentsUS11258707B1Feb 22, 2022
Systems for building data structures with highly scalable algorithms for a distributed LPM implementation
PENSANDO SYSTEMS INC7 citations83
US11588734B2Feb 21, 2023
Systems for providing an LPM implementation for a programmable data plane through a distributed algorithm
PENSANDO SYSTEMS INC0 citations60