Inventor

PARK HYUNCHUL

US54 patents

⚠️ This page may combine multiple inventors who share the name “PARK HYUNCHUL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PARK HYUNCHUL

Puma SE

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GOOGLE LLC

Compiler managed memory for image processor

Compiler techniques for mapping program code to a high performance, power efficient, programmable image processing hardware platform

Compiler techniques for mapping program code to a high performance, power efficient, programmable image processing hardware platform

Compiler managed memory for image processor

Configuration of application software on multi-core image processor

Program code transformations to improve image processor runtime efficiency

Program code transformations to improve image processor runtime efficiency

Configuration of application software on multi-core image processor

Compiler managed memory for image processor

Determination of per line buffer unit memory allocation

Determination of per line buffer unit memory allocation

SAMSUNG ELECTRONICS CO LTD

Zone-based defragmentation methods and user devices using the same

Transformer for low loss and apparatus including the same

Storage device and data management method thereof

Storage device that performs a de-duplication operation, and method of operating the same

Antenna module and electronic device comprising the antenna module

Apparatus and method for amplifying transmission signals in wireless communication system

Antenna module using transmission line length and electronic device including the same

Electronic device including plurality of antenna arrays

Apparatus and method for amplifying power in transmission device

Mixer for reducing local frequency signal generated at output of the mixer

INTEL CORP

Software pipelining at runtime

Dynamic optimization of pipelined software

Conjugate code generation for efficient dynamic optimizations

Technologies for persistent memory programming

Co-designed dynamic language accelerator for a processor

Allocation of alias registers in a pipelined schedule

LG ELECTRONICS INC

Robot having a head unit and a display unit

Robot

QUALCOMM INC

Digital pre-distortion for multi-antenna systems

Power amplifier circuit

CHUNG JAEWOONG

Instruction and logic to monitor loop trip count and remove loop optimizations

SHIM HEEJUN

Processor with reconfigurable architecture including a token network simulating processing of processing elements

JEONG JEONGHOON

Method for adjusting performance of a storage device and a semiconductor storage device therefor

KOREA INST SCI & TECH

Polymer hollow particle, a method of preparing the same, and composite comprising the polymer hollow particle

UNIV KOREA RES & BUS FOUND

Computing in memory electronic device capable of supporting current based analog multiply-accumulation operations and time based analog-to-digital conversion