Inventor
CHEN SHENG-CHIEH
TW24 patents
⚠️ This page may combine multiple inventors who share the name “CHEN SHENG-CHIEH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG CO LTD
17 patentsUS10134748B2Nov 20, 2018
Cell boundary structure for embedded memory
TAIWAN SEMICONDUCTOR MFG CO LTD14 citations92
US10734394B2Aug 4, 2020
Cell boundary structure for embedded memory
TAIWAN SEMICONDUCTOR MFG CO LTD5 citations84
US10535671B2Jan 14, 2020
Cell boundary structure for embedded memory
TAIWAN SEMICONDUCTOR MFG CO LTD5 citations84
US9691883B2Jun 27, 2017
Asymmetric formation approach for a floating gate of a split gate flash memory structure
TAIWAN SEMICONDUCTOR MFG CO LTD7 citations84
US9391151B2Jul 12, 2016
Split gate memory device for improved erase speed
TAIWAN SEMICONDUCTOR MFG CO LTD11 citations84
US10903366B1Jan 26, 2021
Forming fin-FET semiconductor structures
TAIWAN SEMICONDUCTOR MFG CO LTD6 citations73
US9978761B2May 22, 2018
Self-aligned flash memory device
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations73
US12014966B2Jun 18, 2024
Semiconductor memory device having composite dielectric film structure and methods of forming the same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11637046B2Apr 25, 2023
Semiconductor memory device having composite dielectric film structure and methods of forming the same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11424255B2Aug 23, 2022
Semiconductor device and manufacturing method thereof
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11296100B2Apr 5, 2022
Cell boundary structure for embedded memory
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11217596B2Jan 4, 2022
Flash memory with improved gate structure and a method of creating the same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US10868028B2Dec 15, 2020
Flash memory structure with reduced dimension of gate structure and methods of forming thereof
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10510766B2Dec 17, 2019
Flash memory structure with reduced dimension of gate structure and methods of forming thereof
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10461089B2Oct 29, 2019
Cell boundary structure for embedded memory
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10304848B2May 28, 2019
Flash memory structure with reduced dimension of gate structure
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US9716097B2Jul 25, 2017
Techniques to avoid or limit implant punch through in split gate flash memory devices
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations52