Inventor

STEINER WALTER R

US23 patents

⚠️ This page may combine multiple inventors who share the name “STEINER WALTER R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

STEINER WALTER R

NVIDIA CORP

Heuristics for improving performance in a tile based architecture

Distributed tiled caching

State handling in a tiled architecture

Multiresolution consistent rasterization

Efficient round point rasterization

Distributed tiled caching

GEN ELECTRIC

Computer image generation method for determination of total pixel illumination due to plural light sources

YIQ based color cell texture

Computer image generation with topographical response

Picture element encoding

Floating point accumulator circuit

STAR TECHN INC

Geometry processor for graphics display system

Fast architecture for graphics processor

Multifunction arithmetic logic unit circuit

STEINER WALTER R

Method and system for deferred coverage mask generation in a raster stage

Method and system for reducing a polygon bounding box

Method for parallel fine rasterization in a raster stage of a graphics pipeline

US AIR FORCE

Arithmetic pipeline for image processing

BUCHNER GREGORY C

Method for resolving priority between a calligraphically-displayed point feature and both raster-displayed faces and other calligraphically-displayed point features in a CIG system

MARTIN MARIETTA CORP

Method for determining computer image generation display pixels occupied by a circular feature

LUM ERIC

Early sample evaluation during coarse rasterization

INTEL CORP

S-buffer anti-aliasing method

FRENCH MARK J

Optimizing a graphics rendering pipeline using early Z-mode