Inventor
PASSINT RANDAL S
US23 patents
⚠️ This page may combine multiple inventors who share the name “PASSINT RANDAL S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CRAY RESEARCH INC
9 patentsUS5581705ADec 3, 1996
Messaging facility with hardware tail pointer and software implemented head pointer message queue for distributed memory massively parallel processing system
CRAY RESEARCH INC230 citations99
US5970232AOct 19, 1999
Router table lookup mechanism
CRAY RESEARCH INC229 citations98
US5784706AJul 21, 1998
Virtual to logical to physical address translation for distributed memory massively parallel processing systems
CRAY RESEARCH INC121 citations98
US5583990ADec 10, 1996
System for allocating messages between virtual channels to avoid deadlock and to optimize the amount of message traffic on each type of virtual channel
CRAY RESEARCH INC150 citations98
US6101181AAug 8, 2000
Virtual channel assignment in large torus systems
CRAY RESEARCH INC142 citations97
US6085303AJul 4, 2000
Seralized race-free virtual barrier network
CRAY RESEARCH INC62 citations96
US5797035AAug 18, 1998
Networked multiprocessor system with global distributed memory and block transfer engine
CRAY RESEARCH INC91 citations96
US5737628AApr 7, 1998
Multiprocessor computer system with interleaved processing element nodes
CRAY RESEARCH INC91 citations96
US5765181AJun 9, 1998
System and method of addressing distributed memory within a massively parallel processing system
CRAY RESEARCH INC29 citations89
SILICON GRAPHICS INC
8 patentsUS6230252B1May 8, 2001
Hybrid hypercube/torus architecture
SILICON GRAPHICS INC235 citations98
US6674720B1Jan 6, 2004
Age-based network arbitration system and method
SILICON GRAPHICS INC169 citations96
US6973559B1Dec 6, 2005
Scalable hypercube multiprocessor network for massive parallel processing
SILICON GRAPHICS INC19 citations92
US6633958B1Oct 14, 2003
Multiprocessor computer system and method for maintaining cache coherence utilizing a multi-dimensional cache coherence directory structure
SILICON GRAPHICS INC36 citations92
US7464115B2Dec 9, 2008
Node synchronization for multi-processor computer systems
SILICON GRAPHICS INC16 citations84
US7333516B1Feb 19, 2008
Interface for synchronous data transfer between domains clocked at different frequencies
SILICON GRAPHICS INC16 citations83
US6839820B1Jan 4, 2005
Method and system for controlling data access between at least two memory arrangements
SILICON GRAPHICS INC2 citations63
US7386680B2Jun 10, 2008
Apparatus and method of controlling data sharing on a shared memory computer system
SILICON GRAPHICS INC1 citations51