Inventor

CHO BYUNG JIN

KR27 patents

⚠️ This page may combine multiple inventors who share the name “CHO BYUNG JIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHO BYUNG JIN

KOREA ADVANCED INST SCI & TECH

Method and board for growing high-quality graphene layer using high pressure annealing

Method of manufacturing n-doped graphene and electrical component using NH4F, and graphene and electrical component thereby

Charge trapping non-volatile organic memory device

Method for growing high-quality graphene layer

Static change sense flip-flop

Method of sealing open pores on surface of porous dielectric material using iCVD process

HYUNDAI ELECTRONICS IND

Method for forming field oxide of semiconductor device using wet and dry oxidation

Method for forming element isolating film of semiconductor device

Method for forming an isolation insulating film for internal elements of a semiconductor device

Method for isolating elements of semiconductor device

Method for forming field oxide film of semiconductor device

Method for removing defects by ion implantation using medium temperature oxide layer

CHARTERED SEMICONDUCTOR MFG

Method of multiple pulse laser annealing to activate ultra-shallow junctions

Dual step source/drain extension junction anneal to reduce the junction depth: multiple-pulse low energy laser anneal coupled with rapid thermal anneal

CHO BYUNG JIN

Graphene device having physical gap

Non-volatile memory device and MOSFET using graphene gate electrode

KOREA INST ENERGY RES

High-temperature structure for measuring properties of curved thermoelectric device, and system and method for measuring properties of curved thermoelectric device using the same

Fe—Ni/Ti metalized skutterudite thermoelectric material and method of manufacturing the same

SK HYNIX INC

Semiconductor element, method for fabricating the same, and semiconductor device including the same

Capacitor for dynamic random access memory, DRAM including the same and methods of fabricating thereof

UNIV SINGAPORE

Method of fabricating a CMOS device with dual metal gate electrodes

HYUNDAI ELECTRONICS IND CO INC

Method for forming element isolating film of semiconductor device

KOREA INST MACH & MATERIALS

Substrate on which multiple nanogaps are formed, and manufacturing method therefor

SONG HYUN-JAE

Graphene electronic devices having multi-layered gate insulating layer

HYNIX SEMICONDUCTOR INC

Method for forming an oxynitride film in a semiconductor device

SAMSUNG ELECTRONICS CO LTD

Three-dimensional semiconductor memory device with increased electron mobility and electronic system including the same

UNIV YONSEI IACF

Flexible thermoelectric system