Inventor
BERG STEFAN G
US8 patents
Patents
8 patentsUS6732247B2May 4, 2004
Multi-ported memory having pipelined data banks
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Method and apparatus for compressing VLIW instruction and sharing subinstructions
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Program-directed cache prefetching for media processors
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US6859870B1Feb 22, 2005
Method and apparatus for compressing VLIW instruction and sharing subinstructions
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US6779101B1Aug 17, 2004
Method and apparatus for processing compressed VLIW subinstruction opcodes
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US6675286B1Jan 6, 2004
Multimedia instruction set for wide data paths
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US6804771B1Oct 12, 2004
Processor with register file accessible by row column to achieve data array transposition
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US6782470B1Aug 24, 2004
Operand queues for streaming data: A processor register file extension
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