Inventor
BREKELBAUM EDWARD A
US12 patents
⚠️ This page may combine multiple inventors who share the name “BREKELBAUM EDWARD A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
7 patentsUS7692946B2Apr 6, 2010
Memory array on more than one die
INTEL CORP40 citations91
US7313676B2Dec 25, 2007
Register renaming for dynamic multi-threading
INTEL CORP21 citations91
US7130990B2Oct 31, 2006
Efficient instruction scheduling with lossy tracking of scheduling information
INTEL CORP22 citations91
US7428631B2Sep 23, 2008
Apparatus and method using different size rename registers for partial-bit and bulk-bit writes
INTEL CORP8 citations72
US7418551B2Aug 26, 2008
Multi-purpose register cache
INTEL CORP7 citations72
US7111154B2Sep 19, 2006
Method and apparatus for NOP folding
INTEL CORP9 citations71
US7171545B2Jan 30, 2007
Predictive filtering of register cache entry
INTEL CORP2 citations61
SAMSUNG ELECTRONICS CO LTD
3 patentsUS10540287B2Jan 21, 2020
Spatial memory streaming confidence mechanism
SAMSUNG ELECTRONICS CO LTD8 citations82
US10417130B2Sep 17, 2019
System and method for spatial memory streaming training
SAMSUNG ELECTRONICS CO LTD3 citations71
US10387320B2Aug 20, 2019
Integrated confirmation queues
SAMSUNG ELECTRONICS CO LTD0 citations48