Inventor
SADJADI S M REZA
US70 patents
⚠️ This page may combine multiple inventors who share the name “SADJADI S M REZA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LAM RES CORP
37 patentsUS7084070B1Aug 1, 2006
Treatment for corrosion in substrate processing
LAM RES CORP247 citations99
US7271107B2Sep 18, 2007
Reduction of feature critical dimensions using multiple masks
LAM RES CORP134 citations98
US6972524B1Dec 6, 2005
Plasma processing system control
LAM RES CORP87 citations94
US6670278B2Dec 30, 2003
Method of plasma etching of silicon carbide
LAM RES CORP54 citations94
US7271108B2Sep 18, 2007
Multiple mask process with etch mask stack
LAM RES CORP38 citations93
US7241683B2Jul 10, 2007
Stabilized photoresist structure for etching process
LAM RES CORP36 citations93
US7695632B2Apr 13, 2010
Critical dimension reduction and roughness control
LAM RES CORP14 citations92
US7390749B2Jun 24, 2008
Self-aligned pitch reduction
LAM RES CORP41 citations92
US7309646B1Dec 18, 2007
De-fluoridation process
LAM RES CORP25 citations92
US7405521B2Jul 29, 2008
Multiple frequency plasma processor method and apparatus
LAM RES CORP35 citations91
US7250371B2Jul 31, 2007
Reduction of feature critical dimensions
LAM RES CORP27 citations91
US6930048B1Aug 16, 2005
Etching a metal hard mask for an integrated circuit structure
LAM RES CORP43 citations91
US6909195B2Jun 21, 2005
Trench etch process for low-k dielectrics
LAM RES CORP16 citations91
US6962879B2Nov 8, 2005
Method of plasma etching silicon nitride
LAM RES CORP43 citations89
US7273815B2Sep 25, 2007
Etch features with reduced line edge roughness
LAM RES CORP13 citations84
US7022611B1Apr 4, 2006
Plasma in-situ treatment of chemically amplified resist
LAM RES CORP14 citations84
US6969685B1Nov 29, 2005
Etching a dielectric layer in an integrated circuit structure having a metal hard mask layer
LAM RES CORP18 citations84
US8343876B2Jan 1, 2013
Fast gas switching plasma processing apparatus
LAM RES CORP10 citations83
US7910489B2Mar 22, 2011
Infinitely selective photoresist mask etch
LAM RES CORP16 citations83
US7772122B2Aug 10, 2010
Sidewall forming processes
LAM RES CORP11 citations83
US7541291B2Jun 2, 2009
Reduction of feature critical dimensions
LAM RES CORP11 citations83
US7166535B2Jan 23, 2007
Plasma etching of silicon carbide
LAM RES CORP11 citations83
US7838426B2Nov 23, 2010
Mask trimming
LAM RES CORP9 citations82
US6875699B1Apr 5, 2005
Method for patterning multilevel interconnects
LAM RES CORP15 citations82
US6794293B2Sep 21, 2004
Trench etch process for low-k dielectrics
LAM RES CORP14 citations82
US7465525B2Dec 16, 2008
Reticle alignment and overlay for multiple reticle process
LAM RES CORP8 citations73
US7347915B1Mar 25, 2008
Plasma in-situ treatment of chemically amplified resist
LAM RES CORP8 citations73
US6919278B2Jul 19, 2005
Method for etching silicon carbide
LAM RES CORP10 citations73
US7785484B2Aug 31, 2010
Mask trimming with ARL etch
LAM RES CORP7 citations72
US7264743B2Sep 4, 2007
Fin structure formation
LAM RES CORP5 citations72
US7682516B2Mar 23, 2010
Vertical profile fixing
LAM RES CORP6 citations63
US7629259B2Dec 8, 2009
Method of aligning a reticle for formation of semiconductor devices
LAM RES CORP6 citations63
US7491647B2Feb 17, 2009
Etch with striation control
LAM RES CORP3 citations63
US7429533B2Sep 30, 2008
Pitch reduction
LAM RES CORP6 citations63
US7098130B1Aug 29, 2006
Method of forming dual damascene structure
LAM RES CORP6 citations63
US8361564B2Jan 29, 2013
Protective layer for implant photoresist
LAM RES CORP2 citations62
US8357434B1Jan 22, 2013
Apparatus for the deposition of a conformal film on a substrate and methods therefor
LAM RES CORP3 citations62
NAT SEMICONDUCTOR CORP
4 patentsUS5383018AJan 17, 1995
Apparatus and method for calibration of patterned wafer scanners
NAT SEMICONDUCTOR CORP42 citations93
US5342801AAug 30, 1994
Controllable isotropic plasma etching technique for the suppression of stringers in memory cells
NAT SEMICONDUCTOR CORP50 citations92
US5705419AJan 6, 1998
Controllable isotropic plasma etching technique for the suppression of stringers in memory cells
NAT SEMICONDUCTOR CORP25 citations88
US5427967AJun 27, 1995
Technique for making memory cells in a way which suppresses electrically conductive stringers
NAT SEMICONDUCTOR CORP20 citations84
APPLIED MATERIALS INC
3 patentsUS9412579B2Aug 9, 2016
Methods and apparatus for controlling substrate uniformity
APPLIED MATERIALS INC16 citations92
US10410889B2Sep 10, 2019
Systems and methods for electrical and magnetic uniformity and skew tuning in plasma processing reactors
APPLIED MATERIALS INC7 citations84
US10177050B2Jan 8, 2019
Methods and apparatus for controlling substrate uniformity
APPLIED MATERIALS INC5 citations72
INTEL CORP
2 patentsROMANO ANDREW R
1 patentLEE SANGHEON
1 patentHEO DONGHO
1 patentSADJADI S M REZA
1 patentShowing the top 50 of 70 patents by PatentIndex Score.