Inventor

ECKERT YASUKO

US81 patents

Patents

50 patents

US9443561B1Sep 13, 2016

Ring networks for intra- and inter-memory I/O including 3D-stacked memories

ADVANCED MICRO DEVICES INC39 citations93

US11625251B1Apr 11, 2023

Mechanism for reducing coherence directory controller overhead for near-memory compute elements

ADVANCED MICRO DEVICES INC14 citations85

US9286948B2Mar 15, 2016

Query operations for stacked-die memory device

ADVANCED MICRO DEVICES INC13 citations84

US9524164B2Dec 20, 2016

Specialized memory disambiguation mechanisms for different memory read access types

ADVANCED MICRO DEVICES INC15 citations82

US10097091B1Oct 9, 2018

Using predictions of outcomes of cache memory access requests for controlling whether a request generator sends memory access requests to a memory in parallel with cache memory access requests

ADVANCED MICRO DEVICES INC8 citations79

US10503640B2Dec 10, 2019

Selective data retrieval based on access latency

ADVANCED MICRO DEVICES INC2 citations73

US9921635B2Mar 20, 2018

Dynamic and adaptive sleep state management

ADVANCED MICRO DEVICES INC2 citations73

US9658663B2May 23, 2017

Thermally-aware throttling in a three-dimensional processor stack

ADVANCED MICRO DEVICES INC2 citations73

US9251069B2Feb 2, 2016

Mechanisms to bound the presence of cache blocks with specific properties in caches

ADVANCED MICRO DEVICES INC4 citations73

US10705958B2Jul 7, 2020

Coherency directory entry allocation based on eviction costs

ADVANCED MICRO DEVICES INC3 citations72

US10303602B2May 28, 2019

Preemptive cache management policies for processing units

ADVANCED MICRO DEVICES INC3 citations72

US10282295B1May 7, 2019

Reducing cache footprint in cache coherence directory

ADVANCED MICRO DEVICES INC5 citations72

US9947386B2Apr 17, 2018

Thermal aware data placement and compute dispatch in a memory system

ADVANCED MICRO DEVICES INC4 citations72

US9298615B2Mar 29, 2016

Methods and apparatus for soft-partitioning of a data cache for stack data

ADVANCED MICRO DEVICES INC3 citations72

US11921634B2Mar 5, 2024

Leveraging processing-in-memory (PIM) resources to expedite non-PIM instructions executed on a host

ADVANCED MICRO DEVICES INC3 citations71

US11922107B2Mar 5, 2024

Quantum circuit mapping for multi-programmed quantum computers

ADVANCED MICRO DEVICES INC4 citations71

US10970120B2Apr 6, 2021

Method and system for opportunistic load balancing in neural networks using metadata

ADVANCED MICRO DEVICES INC2 citations71

US10389251B2Aug 20, 2019

Setting operating points for circuits in an integrated circuit chip

ADVANCED MICRO DEVICES INC1 citations70

US10133678B2Nov 20, 2018

Method and apparatus for memory management

ADVANCED MICRO DEVICES INC3 citations70

US9378153B2Jun 28, 2016

Early write-back of modified data in a cache memory

ADVANCED MICRO DEVICES INC4 citations70

US9110671B2Aug 18, 2015

Idle phase exit prediction

ADVANCED MICRO DEVICES INC5 citations70

US11068458B2Jul 20, 2021

Mechanism for distributed-system-aware difference encoding/decoding in graph analytics

ADVANCED MICRO DEVICES INC2 citations69

US9251081B2Feb 2, 2016

Management of caches

ADVANCED MICRO DEVICES INC6 citations69

US11586563B2Feb 21, 2023

Distribution of data and memory timing parameters across memory modules based on memory access patterns

ADVANCED MICRO DEVICES INC2 citations68

US10838864B2Nov 17, 2020

Prioritizing local and remote memory access in a non-uniform memory access architecture

ADVANCED MICRO DEVICES INC2 citations68

US10339067B2Jul 2, 2019

Mechanism for reducing page migration overhead in memory systems

ADVANCED MICRO DEVICES INC2 citations67

US12204774B2Jan 21, 2025

Allocation of resources when processing at memory level through memory request scheduling

ADVANCED MICRO DEVICES INC1 citations63

US12033714B2Jul 9, 2024

Interconnect architecture for three-dimensional processing systems

ADVANCED MICRO DEVICES INC0 citations63

US11392508B2Jul 19, 2022

Lightweight address translation for page migration and duplication

ADVANCED MICRO DEVICES INC1 citations63

US10984838B2Apr 20, 2021

Interconnect architecture for three-dimensional processing systems

ADVANCED MICRO DEVICES INC0 citations63

US12585564B2Mar 24, 2026

Methods for configuring span of control under varying temperature

ADVANCED MICRO DEVICES INC0 citations62

US12299445B2May 13, 2025

Register based SIMD lookup table operations

ADVANCED MICRO DEVICES INC0 citations62

US12026401B2Jul 2, 2024

DRAM row management for processing in memory

ADVANCED MICRO DEVICES INC1 citations62

US12008378B2Jun 11, 2024

Mechanism for reducing coherence directory controller overhead for near-memory compute elements

ADVANCED MICRO DEVICES INC1 citations62

US11726915B2Aug 15, 2023

Distributed coherence directory subsystem with exclusive data regions

ADVANCED MICRO DEVICES INC0 citations62

US10635588B2Apr 28, 2020

Distributed coherence directory subsystem with exclusive data regions

ADVANCED MICRO DEVICES INC1 citations62

US9183055B2Nov 10, 2015

Selecting a resource from a set of resources for performing an operation

ADVANCED MICRO DEVICES INC2 citations62

US11989591B2May 21, 2024

Dynamically configurable overprovisioned microprocessor

ADVANCED MICRO DEVICES INC0 citations61

US11880715B2Jan 23, 2024

Method and system for opportunistic load balancing in neural networks using metadata

ADVANCED MICRO DEVICES INC0 citations61

US11403221B2Aug 2, 2022

Memory access response merging in a memory hierarchy

ADVANCED MICRO DEVICES INC0 citations61

US12517669B2Jan 6, 2026

Scheduling processing-in-memory requests and memory requests

ADVANCED MICRO DEVICES INC0 citations60

US12468632B2Nov 11, 2025

Method for embedding rows prefetching in recommendation models

ADVANCED MICRO DEVICES INC0 citations60

US12169758B2Dec 17, 2024

Running instances of a quantum program concurrently on a quantum processor

ADVANCED MICRO DEVICES INC1 citations60

US11507522B2Nov 22, 2022

Memory request priority assignment techniques for parallel processors

ADVANCED MICRO DEVICES INC0 citations60

US11797410B2Oct 24, 2023

Chiplet-level performance information for configuring chiplets in a processor

ADVANCED MICRO DEVICES INC0 citations59

US11586539B2Feb 21, 2023

Adaptive cache management based on programming model information

ADVANCED MICRO DEVICES INC0 citations59

US10938709B2Mar 2, 2021

Mechanism for dynamic latency-bandwidth trade-off for efficient broadcasts/multicasts

ADVANCED MICRO DEVICES INC0 citations59

Showing the top 50 of 81 patents by PatentIndex Score.

ECKERT YASUKO

Patents

Ring networks for intra- and inter-memory I/O including 3D-stacked memories

Mechanism for reducing coherence directory controller overhead for near-memory compute elements

Query operations for stacked-die memory device

Specialized memory disambiguation mechanisms for different memory read access types

Setting operating points for circuits in an integrated circuit chip

Temperature-aware task scheduling and proactive power management

Method and system for shutting down active core based caches

Using predictions of outcomes of cache memory access requests for controlling whether a request generator sends memory access requests to a memory in parallel with cache memory access requests

Selective data retrieval based on access latency

Dynamic and adaptive sleep state management

Thermally-aware throttling in a three-dimensional processor stack

Mechanisms to bound the presence of cache blocks with specific properties in caches

Coherency directory entry allocation based on eviction costs

Preemptive cache management policies for processing units

Reducing cache footprint in cache coherence directory

Thermal aware data placement and compute dispatch in a memory system

Methods and apparatus for soft-partitioning of a data cache for stack data

Leveraging processing-in-memory (PIM) resources to expedite non-PIM instructions executed on a host

Quantum circuit mapping for multi-programmed quantum computers

Method and system for opportunistic load balancing in neural networks using metadata

Setting operating points for circuits in an integrated circuit chip

Method and apparatus for memory management

Early write-back of modified data in a cache memory

Idle phase exit prediction

Mechanism for distributed-system-aware difference encoding/decoding in graph analytics

Management of caches

Distribution of data and memory timing parameters across memory modules based on memory access patterns

Prioritizing local and remote memory access in a non-uniform memory access architecture

Mechanism for reducing page migration overhead in memory systems

Allocation of resources when processing at memory level through memory request scheduling

Interconnect architecture for three-dimensional processing systems

Lightweight address translation for page migration and duplication

Interconnect architecture for three-dimensional processing systems

Methods for configuring span of control under varying temperature

Register based SIMD lookup table operations

DRAM row management for processing in memory

Mechanism for reducing coherence directory controller overhead for near-memory compute elements

Distributed coherence directory subsystem with exclusive data regions

Distributed coherence directory subsystem with exclusive data regions

Selecting a resource from a set of resources for performing an operation

Dynamically configurable overprovisioned microprocessor

Method and system for opportunistic load balancing in neural networks using metadata

Memory access response merging in a memory hierarchy

Scheduling processing-in-memory requests and memory requests

Method for embedding rows prefetching in recommendation models

Running instances of a quantum program concurrently on a quantum processor

Memory request priority assignment techniques for parallel processors

Chiplet-level performance information for configuring chiplets in a processor

Adaptive cache management based on programming model information

Mechanism for dynamic latency-bandwidth trade-off for efficient broadcasts/multicasts