Inventor
BLAETTLER TOBIAS
CH16 patents
Patents
16 patentsUS9513813B1Dec 6, 2016
Determining prefix codes for pseudo-dynamic data compression utilizing clusters formed based on compression ratio
IBM8 citations84
US10361712B2Jul 23, 2019
Non-binary context mixing compressor/decompressor
IBM2 citations73
US9647694B2May 9, 2017
Diagonal anti-diagonal memory structure
IBM3 citations73
US10700702B2Jun 30, 2020
Updating prefix codes for pseudo-dynamic data compression
IBM1 citations62
US10615824B2Apr 7, 2020
Diagonal anti-diagonal memory structure
IBM0 citations52
US10348334B2Jul 9, 2019
Reducing a decoding error floor by post-processing codewords encoded by binary symmetry-invariant product codes
IBM0 citations52
US10268537B2Apr 23, 2019
Initializing a pseudo-dynamic data compression system with predetermined history data typical of actual data
IBM0 citations52
US10128871B2Nov 13, 2018
Diagonal anti-diagonal memory structure
IBM0 citations52
US10042699B2Aug 7, 2018
Multi-chip device and method for storing data
IBM0 citations52
US9891988B2Feb 13, 2018
Device and method for storing data in a plurality of multi-level cell memory chips
IBM1 citations52
US9672921B2Jun 6, 2017
Device and method for storing data in a plurality of multi-level cell memory chips
IBM0 citations52
US9692457B2Jun 27, 2017
Removing error patterns in binary data
IBM1 citations51
US10797723B2Oct 6, 2020
Building a context model ensemble in a context mixing compressor
IBM0 citations41
US9813079B2Nov 7, 2017
High-throughput compression of data
IBM0 citations41
US9715343B2Jul 25, 2017
Multidimensional partitioned storage array and method utilizing input shifters to allow multiple entire columns or rows to be accessed in a single clock cycle
IBM0 citations41
US9442661B2Sep 13, 2016
Multidimensional storage array and method utilizing an input shifter to allow an entire column or row to be accessed in a single clock cycle
IBM0 citations41