Inventor
DIEP Vinh
US28 patents
⚠️ This page may combine multiple inventors who share the name “DIEP Vinh”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SANDISK TECHNOLOGIES LLC
19 patentsUS10510413B1Dec 17, 2019
Multi-pass programming with modified pass voltages to tighten threshold voltage distributions
SANDISK TECHNOLOGIES LLC25 citations94
US10008271B1Jun 26, 2018
Programming of dummy memory cell to reduce charge loss in select gate transistor
SANDISK TECHNOLOGIES LLC44 citations94
US9922705B1Mar 20, 2018
Reducing select gate injection disturb at the beginning of an erase operation
SANDISK TECHNOLOGIES LLC23 citations94
US10566059B2Feb 18, 2020
Three dimensional NAND memory device with drain select gate electrode shared between multiple strings
SANDISK TECHNOLOGIES LLC13 citations86
US10923197B2Feb 16, 2021
Memory device with compensation for erase speed variations due to blocking oxide layer thinning
SANDISK TECHNOLOGIES LLC8 citations84
US10811109B2Oct 20, 2020
Multi-pass programming process for memory device which omits verify test in first program pass
SANDISK TECHNOLOGIES LLC8 citations84
US10741253B1Aug 11, 2020
Memory device with compensation for erase speed variations due to blocking oxide layer thinning
SANDISK TECHNOLOGIES LLC10 citations84
US10706941B1Jul 7, 2020
Multi-state programming in memory device with loop-dependent bit line voltage during verify
SANDISK TECHNOLOGIES LLC6 citations84
US10665301B1May 26, 2020
Memory device with compensation for program speed variations due to block oxide thinning
SANDISK TECHNOLOGIES LLC8 citations84
US10446244B1Oct 15, 2019
Adjusting voltage on adjacent word line during verify of memory cells on selected word line in multi-pass programming
SANDISK TECHNOLOGIES LLC10 citations84
US10276248B1Apr 30, 2019
Early ramp down of dummy word line voltage during read to suppress select gate transistor downshift
SANDISK TECHNOLOGIES LLC13 citations84
US9830963B1Nov 28, 2017
Word line-dependent and temperature-dependent erase depth
SANDISK TECHNOLOGIES LLC14 citations84
US11037640B2Jun 15, 2021
Multi-pass programming process for memory device which omits verify test in first program pass
SANDISK TECHNOLOGIES LLC3 citations73
US10636501B1Apr 28, 2020
Memory device with reduced neighbor word line interference using adjustable voltage on source-side unselected word line
SANDISK TECHNOLOGIES LLC4 citations73
US10482981B2Nov 19, 2019
Preventing refresh of voltages of dummy memory cells to reduce threshold voltage downshift for select gate transistors
SANDISK TECHNOLOGIES LLC3 citations73
US10068651B1Sep 4, 2018
Channel pre-charge to suppress disturb of select gate transistors during erase in memory
SANDISK TECHNOLOGIES LLC3 citations73
US11024387B2Jun 1, 2021
Memory device with compensation for program speed variations due to block oxide thinning
SANDISK TECHNOLOGIES LLC0 citations62
US10854300B2Dec 1, 2020
Multi-state programming in memory device with loop-dependent bit line voltage during verify
SANDISK TECHNOLOGIES LLC1 citations62
US10878914B2Dec 29, 2020
Memory device with compensation for program speed variations due to block oxide thinning
SANDISK TECHNOLOGIES LLC0 citations52
APPLE INC
4 patentsUS7539015B2May 26, 2009
Riser card housing
APPLE INC5 citations61
US9095076B2Jul 28, 2015
Electronic device enclosures and heatsink structures with thermal management features
APPLE INC3 citations60
US10591956B2Mar 17, 2020
Foldable case for use with an electronic device
APPLE INC0 citations52
US9760118B2Sep 12, 2017
Foldable case for use with an electronic device
APPLE INC1 citations52