P

Inventor

DODSON JOHN S

US42 patents
⚠️ This page may combine multiple inventors who share the name “DODSON JOHN S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

34 patents
US5613153AMar 18, 1997

Coherency and synchronization mechanisms for I/O channel controllers in a data processing system

IBM96 citations96
US9684461B1Jun 20, 2017

Dynamically adjusting read data return sizes based on memory interface bus utilization

IBM20 citations92
US9495231B2Nov 15, 2016

Reestablishing synchronization in a memory system

IBM6 citations84
US9430418B2Aug 30, 2016

Synchronization and order detection in a memory system

IBM11 citations84
US9058260B2Jun 16, 2015

Transient condition management utilizing a posted error detection processing protocol

IBM8 citations84
US9318171B2Apr 19, 2016

Dual asynchronous and synchronous memory system

IBM8 citations83
US9142272B2Sep 22, 2015

Dual asynchronous and synchronous memory system

IBM9 citations83
US9892066B1Feb 13, 2018

Dynamically adjusting read data return sizes based on interconnect bus utilization

IBM7 citations82
US10353669B2Jul 16, 2019

Managing entries in a mark table of computer memory errors

IBM2 citations73
US10338999B2Jul 2, 2019

Confirming memory marks indicating an error in computer memory

IBM2 citations73
US10304560B2May 28, 2019

Performing error correction in computer memory

IBM2 citations73
US10297335B2May 21, 2019

Tracking address ranges for computer memory errors

IBM4 citations73
US9594647B2Mar 14, 2017

Synchronization and order detection in a memory system

IBM4 citations73
US9378144B2Jun 28, 2016

Modification of prefetch depth based on high latency event

IBM3 citations73
US9128834B2Sep 8, 2015

Implementing memory module communications with a host processor in multiported memory configurations

IBM5 citations73
US5548797AAug 20, 1996

Digital clock pulse positioning circuit for delaying a signal input by a fist time duration and a second time duration to provide a positioned clock signal

IBM10 citations73
US9136987B2Sep 15, 2015

Replay suspension in a memory system

IBM4 citations72
US8990640B2Mar 24, 2015

Selective posted data error detection based on request type

IBM2 citations63
US11017875B2May 25, 2021

Tracking address ranges for computer memory errors

IBM0 citations62
US10971246B2Apr 6, 2021

Performing error correction in computer memory

IBM0 citations62
US9384136B2Jul 5, 2016

Modification of prefetch depth based on high latency event

IBM2 citations62
US8996824B2Mar 31, 2015

Memory reorder queue biasing preceding high latency operations

IBM2 citations62
US5623694AApr 22, 1997

Aborting an I/O operation started before all system data is received by the I/O controller after detecting a remote retry operation

IBM4 citations62
US10176125B2Jan 8, 2019

Dynamically adjusting read data return sizes based on interconnect bus utilization

IBM1 citations60
US10019370B2Jul 10, 2018

Probabilistic associative cache

IBM1 citations52
US9594646B2Mar 14, 2017

Reestablishing synchronization in a memory system

IBM0 citations52
US9535778B2Jan 3, 2017

Reestablishing synchronization in a memory system

IBM0 citations52
US9495254B2Nov 15, 2016

Synchronization and order detection in a memory system

IBM0 citations52
US9471410B2Oct 18, 2016

Transient condition management utilizing a posted error detection processing protocol

IBM0 citations52
US9058178B2Jun 16, 2015

Selective posted data error detection based on request type

IBM0 citations52
US10649511B2May 12, 2020

Scalable data collection for system management

IBM0 citations51
US10317964B2Jun 11, 2019

Scalable data collection for system management

IBM0 citations51
US9250666B2Feb 2, 2016

Scalable data collection for system management

IBM0 citations49
US8543759B2Sep 24, 2013

Method for scheduling memory refresh operations including power states

IBM0 citations48

DODSON JOHN S

5 patents

WELFORD WALTER T

1 patent

LAWRENCE JOHN C

1 patent

BRITTAIN MARK A

1 patent