Inventor

LIN SUNG-WEI

US41 patents

⚠️ This page may combine multiple inventors who share the name “LIN SUNG-WEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIN SUNG-WEI

TEXAS INSTRUMENTS INC

Segmented, multiple-decoder memory array and method for programming a memory array

High voltage negative charge pump with low voltage CMOS transistors

Electrically programmable, electrically erasable memory array cell with field plate

Hot electron programmable, tunnel electron erasable contactless EEPROM

Smart erase algorithm with secure scheme for flash EPROMs

Method for programming EEPROM memory arrays

Programming of an electrically-erasable, electrically-programmable, read-only memory array

Bit and block erasing of an electrically erasable and programmable read-only memory array

Electrically-erasable, electrically-programmable read-only memory cell

Method of making hot electron programmable, tunnel electron erasable contactless EEPROM

Electrically programmable and erasable memory cells with field plate conductor defined drain regions

Low resistance plate line bus architecture

Method and apparatus to reduce storage node disturbance in ferroelectric memory

Array-source line, bitline and wordline sequence in flash operations

Erase procedure

Method of making an EEPROM cell with separate erasing and programming regions

Circuit for testing power-on-reset circuitry

Current-sensing power-on reset circuit for integrated circuits

High voltage negative charge pump with low voltage CMOS transistors

Wordline driver circuit for EEPROM memory cell

Driving circuitry for EEPROM memory cell

Electrically-erasable, electrically-programmable read-only memory cell, an array of such cells and methods for making and using the same

Methods and systems for accessing memory

Method of producing a self-aligned window at recessed intersection of insulating regions

Fabricating an electrically-erasable, electrically-programmable read-only memory having a tunnel window insulator and thick oxide isolation between wordlines

Method of making an electrically-erasable, electrically-programmable read-only memory cell with self-aligned tunnel

Electrically-erasable, electrically-programmable read-only memory

Electrically-erasable, electrically-programmable read-only memory cell with self-aligned tunnel

High-voltage sensor for integrated circuits

Circuit and method for detecting column-line shorts in integrated-circuit memories

Accelerated low power fatigue testing of FRAM

Temperature and supply-voltage sensing circuit

Memory device performance by delayed power-down

Plateline driver with RAMP rate control

Smart boost circuit for low voltage flash EPROM

Method of making electrically-erasable, electrically-programmable read-only memory cell having a tunnel window insulator and forming implanted regions for isolation between wordlines

System and method for reading memory

Active float for the dummy bit lines in FeRAM

FREESCALE SEMICONDUCTOR INC

Gate voltage reduction in a memory read

Auto-tuneable reference circuit for flash EEPROM products

TEXAS INSTR INC A DELAWARE COR

Method and device for detecting and controlling an array source signal discharge for a memory erase operation