Inventor
WIRBELEIT FRANK
DE25 patents
⚠️ This page may combine multiple inventors who share the name “WIRBELEIT FRANK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ADVANCED MICRO DEVICES INC
9 patentsUS7410859B1Aug 12, 2008
Stressed MOS device and method for its fabrication
ADVANCED MICRO DEVICES INC61 citations97
US7442971B2Oct 28, 2008
Self-biasing transistor structure and an SRAM cell having less than six transistors
ADVANCED MICRO DEVICES INC133 citations94
US7494906B2Feb 24, 2009
Technique for transferring strain into a semiconductor region
ADVANCED MICRO DEVICES INC22 citations92
US7329599B1Feb 12, 2008
Method for fabricating a semiconductor device
ADVANCED MICRO DEVICES INC20 citations91
US7547610B2Jun 16, 2009
Method of making a semiconductor device comprising isolation trenches inducing different types of strain
ADVANCED MICRO DEVICES INC11 citations83
US7326601B2Feb 5, 2008
Methods for fabrication of a stressed MOS device
ADVANCED MICRO DEVICES INC9 citations83
US7569437B2Aug 4, 2009
Formation of transistor having a strained channel region including a performance enhancing material composition utilizing a mask pattern
ADVANCED MICRO DEVICES INC6 citations63
US7696534B2Apr 13, 2010
Stressed MOS device
ADVANCED MICRO DEVICES INC2 citations62
US7329606B1Feb 12, 2008
Semiconductor device having nanowire contact structures and method for its fabrication
ADVANCED MICRO DEVICES INC2 citations62
GLOBALFOUNDRIES INC
7 patentsUS7880239B2Feb 1, 2011
Body controlled double channel transistor and circuits comprising the same
GLOBALFOUNDRIES INC7 citations84
US7811876B2Oct 12, 2010
Reduction of memory instability by local adaptation of re-crystallization conditions in a cache area of a semiconductor device
GLOBALFOUNDRIES INC14 citations83
US8003460B2Aug 23, 2011
Method of forming a semiconductor structure comprising a formation of at least one sidewall spacer structure
GLOBALFOUNDRIES INC3 citations63
US7727827B2Jun 1, 2010
Method of forming a semiconductor structure
GLOBALFOUNDRIES INC2 citations63
US7906385B2Mar 15, 2011
Method for selectively forming strain in a transistor by a stress memorization technique without adding additional lithography steps
GLOBALFOUNDRIES INC3 citations62
US7964458B2Jun 21, 2011
Method for forming a strained transistor by stress memorization based on a stressed implantation mask
GLOBALFOUNDRIES INC1 citations52
US7787108B2Aug 31, 2010
Inline stress evaluation in microstructure devices
GLOBALFOUNDRIES INC0 citations52
WIRBELEIT FRANK
6 patentsUS8183096B2May 22, 2012
Static RAM cell design and multi-contact regime for connecting double channel transistors
WIRBELEIT FRANK120 citations98
US8664056B2Mar 4, 2014
Transistor with embedded strain-inducing material formed in diamond-shaped cavities based on a pre-amorphization
WIRBELEIT FRANK7 citations83
US8164145B2Apr 24, 2012
Three-dimensional transistor with double channel configuration
WIRBELEIT FRANK11 citations83
US9117929B2Aug 25, 2015
Method for forming a strained transistor by stress memorization based on a stressed implantation mask
WIRBELEIT FRANK2 citations62
US8507953B2Aug 13, 2013
Body controlled double channel transistor and circuits comprising the same
WIRBELEIT FRANK0 citations51
US8264020B2Sep 11, 2012
Static RAM cell design and multi-contact regime for connecting double channel transistors
WIRBELEIT FRANK0 citations51