Inventor
BROWN JEFF S
US18 patents
⚠️ This page may combine multiple inventors who share the name “BROWN JEFF S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LSI LOGIC CORP
7 patentsUS6434657B1Aug 13, 2002
Method and apparatus for accommodating irregular memory write word widths
LSI LOGIC CORP35 citations92
US6075733AJun 13, 2000
Technique for reducing peak current in memory operation
LSI LOGIC CORP20 citations92
US5991890ANov 23, 1999
Device and method for characterizing signal skew
LSI LOGIC CORP17 citations79
US6950352B1Sep 27, 2005
Method and apparatus for replacing a defective cell within a memory device having twisted bit lines
LSI LOGIC CORP11 citations73
US6225833B1May 1, 2001
Differential sense amplifier with voltage margin enhancement
LSI LOGIC CORP13 citations73
US6072738AJun 6, 2000
Cycle time reduction using an early precharge
LSI LOGIC CORP15 citations73
US5999469ADec 7, 1999
Sense time reduction using midlevel precharge
LSI LOGIC CORP3 citations62
BROWN JEFF S
3 patentsUS8115531B1Feb 14, 2012
D flip-flop having enhanced immunity to single-event upsets and method of operation thereof
BROWN JEFF S19 citations89
US8209573B2Jun 26, 2012
Sequential element low power scan implementation
BROWN JEFF S5 citations60
US8135976B2Mar 13, 2012
Modulated clock, an IC including the modulated clock and a method of providing a modulated clock signal for power control
BROWN JEFF S3 citations58
LSI CORP
3 patentsUS7932762B2Apr 26, 2011
Latch and DFF design with improved soft error rate and a method of operating a DFF
LSI CORP4 citations62
US8055467B2Nov 8, 2011
Method of generating a restricted inline resistive fault pattern and a test pattern generator
LSI CORP2 citations50
US8773192B2Jul 8, 2014
Overshoot suppression for input/output buffers
LSI CORP1 citations48