Inventor
SCHREIBER ROBERT S
US19 patents
⚠️ This page may combine multiple inventors who share the name “SCHREIBER ROBERT S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
HEWLETT PACKARD CO
5 patentsUS6507947B1Jan 14, 2003
Programmatic synthesis of processor element arrays
HEWLETT PACKARD CO402 citations97
US6438747B1Aug 20, 2002
Programmatic iteration scheduling for parallel processors
HEWLETT PACKARD CO176 citations96
US6374403B1Apr 16, 2002
Programmatic method for reducing cost of control in parallel processes
HEWLETT PACKARD CO148 citations96
US6460173B1Oct 1, 2002
Function unit allocation in processor design
HEWLETT PACKARD CO24 citations92
US6298471B1Oct 2, 2001
Interconnect minimization in processor design
HEWLETT PACKARD CO15 citations84
HEWLETT PACKARD DEVELOPMENT CO
5 patentsUS6952821B2Oct 4, 2005
Method and system for memory management optimization
HEWLETT PACKARD DEVELOPMENT CO63 citations96
US6952816B2Oct 4, 2005
Methods and apparatus for digital circuit design generation
HEWLETT PACKARD DEVELOPMENT CO57 citations92
US6963823B1Nov 8, 2005
Programmatic design space exploration through validity filtering and quality filtering
HEWLETT PACKARD DEVELOPMENT CO14 citations84
US7107199B2Sep 12, 2006
Method and system for the design of pipelines of processors
HEWLETT PACKARD DEVELOPMENT CO17 citations81
US7363459B2Apr 22, 2008
System and method of optimizing memory usage with data lifetimes
HEWLETT PACKARD DEVELOPMENT CO0 citations50
XEROX CORP
2 patentsUS5475842ADec 12, 1995
Method of compilation optimization using an N-dimensional template for relocated and replicated alignment of arrays in data-parallel programs for reduced data communication during execution
XEROX CORP68 citations95
US5450313ASep 12, 1995
Generating local addresses and communication sets for data-parallel programs
XEROX CORP29 citations89
SCHREIBER ROBERT S
2 patentsAHN JUNG HO
2 patentsUS8924639B2Dec 30, 2014
Independently controllable and reconfigurable virtual memory devices in memory modules that are pin-compatible with standard memory modules
AHN JUNG HO9 citations83
US8812886B2Aug 19, 2014
Dynamic utilization of power-down modes in multi-core memory modules
AHN JUNG HO2 citations60