Inventor
ANEMIKOS THEODOROS E
US8 patents
⚠️ This page may combine multiple inventors who share the name “ANEMIKOS THEODOROS E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
5 patentsUS7810054B2Oct 5, 2010
Method of optimizing power usage of an integrated circuit design by tuning selective voltage binning cut point
IBM11 citations82
US7877714B2Jan 25, 2011
System and method to optimize semiconductor power by integration of physical design timing and product performance measurements
IBM10 citations81
US7487487B1Feb 3, 2009
Design structure for monitoring cross chip delay variation on a semiconductor device
IBM8 citations79
US9310426B2Apr 12, 2016
On-going reliability monitoring of integrated circuit chips in the field
IBM6 citations71
US7521973B1Apr 21, 2009
Clock-skew tuning apparatus and method
IBM4 citations56
ANEMIKOS THEODOROS E
3 patentsUS8421495B1Apr 16, 2013
Speed binning for dynamic and adaptive power control
ANEMIKOS THEODOROS E11 citations82
US8239811B2Aug 7, 2012
System and method for wireless and dynamic intra-process measurement of integrated circuit parameters
ANEMIKOS THEODOROS E2 citations59
US9429619B2Aug 30, 2016
Reliability test screen optimization
ANEMIKOS THEODOROS E1 citations44