Inventor

CHUANG HAK-LAY

SG21 patents

⚠️ This page may combine multiple inventors who share the name “CHUANG HAK-LAY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHUANG HAK-LAY

CHUANG HAK-LAY

Device with a vertical gate structure

N/P boundary effect reduction for metal gate transistors

Large dimension device and method of manufacturing same in gate last process

Contact for high-K metal gate device

Semiconductor structure with suppressed STI dishing effect at resistor region

Enhanced gate replacement process for high-K metal gate technology

Method of fabricating a semiconductor device having a defined minimum gate spacing between adjacent gate structures

System and method for a field-effect transistor with a raised drain structure

Metal gate semiconductor device and method of fabricating thereof

MOTOROLA INC

Lithographic proximity correction through subset feature modification

Method of forming an interconnect structure with a graded composition using a nitrided target

Process for fabricating a semiconductor device

NG JIN-AUN

Self-aligned insulated film for high-k metal gate device

Method of hybrid high-k/metal-gate stack fabrication

ZHU MING

Cost-effective gate replacement process

LAI SU-CHEN

Method of fabricating a dummy gate structure in a gate last process

CHEN PO-NIEN

Device for high-K and metal gate stacks

CHUNG SHENG-CHEN

Method of fabricating a metal gate semiconductor device

TAIWAN SEMICONDUCTOR MFG CO LTD

N/P boundary effect reduction for metal gate transistors

TAIWAN SEMICONDUCTOR MFG

N/P boundary effect reduction for metal gate transistors

LIN JYUN-MING

Device for high-K and metal gate stacks