Inventor
MONDAL SANJOY K
US25 patents
⚠️ This page may combine multiple inventors who share the name “MONDAL SANJOY K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
22 patentsUS7562179B2Jul 14, 2009
Maintaining processor resources during architectural events
INTEL CORP30 citations96
US7552254B1Jun 23, 2009
Associating address space identifiers with active contexts
INTEL CORP46 citations92
US7356735B2Apr 8, 2008
Providing support for single stepping a virtual machine in a virtual machine environment
INTEL CORP20 citations92
US7305592B2Dec 4, 2007
Support for nested fault in a virtual machine environment
INTEL CORP34 citations92
US10740249B2Aug 11, 2020
Maintaining processor resources during architectural events
INTEL CORP2 citations84
US10303620B2May 28, 2019
Maintaining processor resources during architectural events
INTEL CORP2 citations84
US9507730B2Nov 29, 2016
Maintaining processor resources during architectural events
INTEL CORP2 citations74
US8788790B2Jul 22, 2014
Maintaining processor resources during architectural events
INTEL CORP3 citations74
US7904694B2Mar 8, 2011
Maintaining processor resources during architectural events
INTEL CORP2 citations74
US9710385B2Jul 18, 2017
Method and apparatus for accessing physical memory from a CPU or processing element in a high performance manner
INTEL CORP2 citations72
US9996475B2Jun 12, 2018
Maintaining processor resources during architectural events
INTEL CORP0 citations63
US9164918B2Oct 20, 2015
Maintaining processor resources during architectural events
INTEL CORP1 citations63
US9152561B2Oct 6, 2015
Maintaining processor resources during architectural events
INTEL CORP1 citations63
US8806172B2Aug 12, 2014
Maintaining processor resources during architectural evens
INTEL CORP0 citations63
US7899972B2Mar 1, 2011
Maintaining processor resources during architectural events
INTEL CORP0 citations63
US8352770B2Jan 8, 2013
Method, system and apparatus for low-power storage of processor context information
INTEL CORP3 citations62
US7937525B2May 3, 2011
Method and apparatus for decoding a virtual machine control structure identification
INTEL CORP4 citations62
US9086958B2Jul 21, 2015
Maintaining processor resources during architectural events
INTEL CORP0 citations59
US9164901B2Oct 20, 2015
Maintaining processor resources during architectural events
INTEL CORP0 citations52
US10282300B2May 7, 2019
Accessing physical memory from a CPU or processing element in a high performance manner
INTEL CORP0 citations51
US8719612B2May 6, 2014
Method, system and apparatus for low-power storage of processor context information
INTEL CORP0 citations51
US7370181B2May 6, 2008
Single stepping a virtual machine guest using a reorder buffer
INTEL CORP0 citations51