Inventor
GAUDIN GWELTAZ
FR20 patents
⚠️ This page may combine multiple inventors who share the name “GAUDIN GWELTAZ”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SOITEC SILICON ON INSULATOR
11 patentsUS8999090B2Apr 7, 2015
Process for bonding two substrates
SOITEC SILICON ON INSULATOR10 citations77
US9123631B2Sep 1, 2015
Method for molecular adhesion bonding with compensation for radial misalignment
SOITEC SILICON ON INSULATOR4 citations72
US8735946B2May 27, 2014
Substrate having a charged zone in an insulating buried layer
SOITEC SILICON ON INSULATOR4 citations71
US11159140B2Oct 26, 2021
Hybrid structure for a surface acoustic wave device
SOITEC SILICON ON INSULATOR2 citations69
US11239108B2Feb 1, 2022
Method for producing a donor substrate for creating a three-dimensional integrated structure, and method for producing such an integrated structure
SOITEC SILICON ON INSULATOR0 citations62
US9330958B2May 3, 2016
Process for fabricating a heterostructure limiting the formation of defects
SOITEC SILICON ON INSULATOR2 citations62
US11156778B2Oct 26, 2021
Method for manufacturing a semiconductor structure
SOITEC SILICON ON INSULATOR0 citations52
US12087631B2Sep 10, 2024
Method for producing a composite structure comprising a thin monocristalline layer on a carrier substrate
SOITEC SILICON ON INSULATOR0 citations51
US9117686B2Aug 25, 2015
3D integrated heterostructures having low-temperature bonded interfaces with high bonding energy
SOITEC SILICON ON INSULATOR0 citations51
US9905531B2Feb 27, 2018
Method for producing composite structure with metal/metal bonding
SOITEC SILICON ON INSULATOR1 citations50
US9548237B2Jan 17, 2017
Method for transferring a layer comprising a compressive stress layer and related structures
SOITEC SILICON ON INSULATOR0 citations41
GAUDIN GWELTAZ
3 patentsUS8475612B2Jul 2, 2013
Method for molecular adhesion bonding with compensation for radial misalignment
GAUDIN GWELTAZ23 citations90
US8603896B2Dec 10, 2013
Method for transferring a monocrystalline semiconductor layer onto a support substrate
GAUDIN GWELTAZ2 citations61
US8790992B2Jul 29, 2014
Low-temperature bonding process
GAUDIN GWELTAZ2 citations60