Inventor

KODURI SREENIVASAN K

US95 patents

⚠️ This page may combine multiple inventors who share the name “KODURI SREENIVASAN K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KODURI SREENIVASAN K

TEXAS INSTRUMENTS INC

Power semiconductor devices having integrated inductor

Wire bonding with capillary realignment

Back side coating of semiconductor wafers

Bumpless wafer scale device and board assembly

Electrical device terminal finishing

Structure and method for power field effect transistor

Power semiconductor devices having integrated inductor

Power semiconductor devices having integrated inductor

Flip-chip without bumps and polymer for board assembly

Manufacturing method for integrating a shunt resistor into a semiconductor package

Method of controlling bond process quality by measuring wire bond features

Alignment apparatus for wire bonding capillary

Wire bonding capillary alignment display system

Stepwise autorotation of wire bonding capillary

Steady autorotation of wire bonding capillary

Lidar imaging receiver

Multirow gull-wing package for microelectronic devices

Microelectronic device with pillars having flared ends

Multi-pitch leads

Automated analog and mixed-signal circuit design and validation

Process aware compact representation of integrated circuits

Cantilevered leadframe support structure for magnetic wireless transfer between integrated circuit dies

Cantilevered leadframe support structure for magnetic wireless transfer between integrated circuit dies

System and method to reduce bond program errors of integrated circuit bonders

Electronic device multilevel package substrate for improved electromigration preformance

Package for power semiconductor devices

Integration of a passive component in a cavity of an integrated circuit package

Process and system to package residual quantities of wafer level packages

Expanded head pillar for bump bonds

Industrial chip scale package for microelectronic device

Inductor on microelectronic die

Printed package and method of making the same

Pre-molded leadframes in semiconductor devices

Leadframes in semiconductor devices

Wafer level bump stack for chip scale package

Three-dimensional functional integration

Packaged device with die wrapped by a substrate

Integrated capacitor with extended head bump bond pillar

Microelectronic device with pillars having flared ends

Industrial chip scale package for microelectronic device

Multi-pitch leads

Three-dimensional functional integration

Inductor on microelectronic die

Shaped interconnect bumps in semiconductor devices

Packaged device with die wrapped by a substrate

KUMMERL STEVEN A

Semiconductor package with a mold material encapsulating a chip and a portion of a lead frame

KODURI SREENIVASAN K

Method for semiconductor leadframes in low volume and rapid turnaround

MANACK CHRISTOPHER D

Methods for embedding controlled-cavity MEMS package in integration board

ROMIG MATTHEW DAVID

Electronic assembly with three dimensional inkjet printed traces

UDOMPANYAVIT UBOL

Manufacturing method for integrating a shunt resistor into a semiconductor package