Inventor

SHAH JASPAL SINGH

CA17 patents

⚠️ This page may combine multiple inventors who share the name “SHAH JASPAL SINGH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHAH JASPAL SINGH

TAIWAN SEMICONDUCTOR MFG CO LTD

Circuits and methods of mitigating hold time failure of pipeline for memory device

Write assist circuit of memory device

Write assist circuit of memory device

Technique to mitigate clock generation failure at high input clock slew

Semiconductor device including first and second clock generators

Method, device, and circuit for high-speed memories

Memory device having a comparator circuit

Method, device, and circuit for high-speed memories

Memory power management

Circuits and methods of mitigating hold time failure of pipeline for memory device

Write assist circuit of memory device

Write assist circuit of memory device

Memory device having a comparator circuit

Memory power management

Write assist circuit of memory device

SACHDEV MANOJ

Threshold voltage mismatch compensation sense-amplifiers for static random access memories with multiple differential inputs

Sense-amplification with offset cancellation for static random access memories